From 6822ad81d0e00b9bb11d1c3ccb0f5aee54c66529 Mon Sep 17 00:00:00 2001 From: shuo zheng <112080416@qq.com> Date: Wed, 11 Feb 2026 01:18:00 +0800 Subject: [PATCH] =?UTF-8?q?1=E3=80=81=E6=B5=8B=E8=AF=95=E4=B8=B2=E5=8F=A33?= =?UTF-8?q?=EF=BC=8C=E5=B0=B1=E6=94=B6=E4=B8=8D=E5=88=B0=E6=95=B0=E6=8D=AE?= =?UTF-8?q?=202=E3=80=81=E4=B8=B2=E5=8F=A34=EF=BC=8C=E4=B8=8D=E5=86=8D?= =?UTF-8?q?=E5=8D=A1=E6=AD=BB=EF=BC=8C=E4=BD=86=E6=98=AF=E6=B2=A1=E6=9C=89?= =?UTF-8?q?=E7=9B=91=E6=B5=8B=E5=88=B0=E8=BE=93=E5=87=BA=203=E3=80=81?= =?UTF-8?q?=E6=B5=8B=E8=AF=95=E6=8E=A8=E6=9D=86=E7=A8=8B=E5=BA=8F=E7=AE=80?= =?UTF-8?q?=E5=8D=95=E7=9A=84=E8=B0=83=E8=AF=95=E4=BA=86=E4=B8=80=E4=B8=8B?= =?UTF-8?q?=EF=BC=8C=E6=95=88=E6=9E=9C=E4=B8=8D=E7=90=86=E6=83=B3?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- HARDWARE/LED/led.c | 1 - HARDWARE/LED/led.h | 39 + HARDWARE/MOTOR/motor_driver.c | 182 +++ HARDWARE/MOTOR/motor_driver.h | 38 + HARDWARE/TIMER/timer.c | 130 +-- OBJ/USART.axf | Bin 0 -> 385444 bytes OBJ/USART.build_log.htm | 46 + OBJ/USART.htm | 974 ++++++++++++++++ OBJ/USART.lnp | 28 + OBJ/USART.sct | 1 + OBJ/USART_USART.dep | 811 +++++++++++++ OBJ/USART_sct.Bak | 1 - OBJ/adc.crf | Bin 435299 -> 435299 bytes OBJ/beep.crf | Bin 434286 -> 434286 bytes OBJ/delay.crf | Bin 435046 -> 435046 bytes OBJ/elemachinery.crf | Bin 443592 -> 443592 bytes OBJ/key.crf | Bin 435384 -> 435384 bytes OBJ/led.crf | Bin 434915 -> 435509 bytes OBJ/main.crf | Bin 443398 -> 445640 bytes OBJ/misc.crf | Bin 433531 -> 433531 bytes OBJ/motor_driver.crf | Bin 0 -> 437458 bytes OBJ/spi.crf | Bin 436551 -> 436551 bytes OBJ/startup_stm32f40_41xxx.lst | 1957 ++++++++++++++++++++++++++++++++ OBJ/stm32f4xx_adc.crf | Bin 440274 -> 440274 bytes OBJ/stm32f4xx_gpio.crf | Bin 435620 -> 435620 bytes OBJ/stm32f4xx_it.crf | Bin 432941 -> 432941 bytes OBJ/stm32f4xx_rcc.crf | Bin 444154 -> 444154 bytes OBJ/stm32f4xx_spi.crf | Bin 438355 -> 438355 bytes OBJ/stm32f4xx_syscfg.crf | Bin 433860 -> 433860 bytes OBJ/stm32f4xx_tim.crf | Bin 453509 -> 453509 bytes OBJ/stm32f4xx_usart.crf | Bin 438745 -> 438745 bytes OBJ/sys.crf | Bin 434002 -> 434002 bytes OBJ/system_stm32f4xx.crf | Bin 434722 -> 434722 bytes OBJ/timer.crf | Bin 438301 -> 438615 bytes OBJ/usart.crf | Bin 447295 -> 447615 bytes USER/USART.uvguix.baiba | 142 ++- USER/USART.uvoptx | 117 +- USER/USART.uvprojx | 18 +- USER/main.c | 103 +- 39 files changed, 4399 insertions(+), 189 deletions(-) create mode 100644 HARDWARE/MOTOR/motor_driver.c create mode 100644 HARDWARE/MOTOR/motor_driver.h create mode 100644 OBJ/USART.axf create mode 100644 OBJ/USART.build_log.htm create mode 100644 OBJ/USART.htm create mode 100644 OBJ/USART.lnp create mode 100644 OBJ/USART_USART.dep create mode 100644 OBJ/motor_driver.crf create mode 100644 OBJ/startup_stm32f40_41xxx.lst diff --git a/HARDWARE/LED/led.c b/HARDWARE/LED/led.c index 9ad8d61..469fcf0 100644 --- a/HARDWARE/LED/led.c +++ b/HARDWARE/LED/led.c @@ -92,4 +92,3 @@ void gpio_Init(void) - diff --git a/HARDWARE/LED/led.h b/HARDWARE/LED/led.h index 1537413..0aba421 100644 --- a/HARDWARE/LED/led.h +++ b/HARDWARE/LED/led.h @@ -20,5 +20,44 @@ #define LED0 PFout(9) // DS0 #define LED1 PFout(10) // DS1 + +#define LLL_Pin GPIO_PIN_9 +#define LLL_GPIO_Port GPIOE //左推杆正 + +#define L_D_Pin GPIO_PIN_13 +#define L_D_GPIO_Port GPIOE //左推杆负 + +#define L_INT_Pin_Pin GPIO_PIN_4 +#define L_INT_Pin_GPIO_Port GPIOE //左推杆中断 + + +#define MMM_Pin GPIO_PIN_3 +#define MMM_GPIO_Port GPIOB //中推杆正 + +#define M_D_Pin GPIO_PIN_14 +#define M_D_GPIO_Port GPIOE //中推杆负 + +#define M_INT_Pin_Pin GPIO_PIN_5 +#define M_INT_Pin_GPIO_Port GPIOE //中推杆中断 + + + +#define RRR_Pin GPIO_PIN_15 +#define RRR_GPIO_Port GPIOD //右推杆正 + +#define R_D_Pin GPIO_PIN_15 +#define R_D_GPIO_Port GPIOE //右推杆负 + + + + +#define R_INT_Pin_Pin GPIO_PIN_6 +#define R_INT_Pin_GPIO_Port GPIOE //右推杆中断 + + + + + + void LED_Init(void);//初始化 #endif diff --git a/HARDWARE/MOTOR/motor_driver.c b/HARDWARE/MOTOR/motor_driver.c new file mode 100644 index 0000000..4ef8195 --- /dev/null +++ b/HARDWARE/MOTOR/motor_driver.c @@ -0,0 +1,182 @@ +// motor_driver.c +#include "motor_driver.h" +#include "delay.h" +// 全局变量 +static uint8_t pwm_duty = 0; // PWM占空比 0-100 +static MotorState motor_dir = MOTOR_STOP; + +// GPIO初始化 +void DRV8832_GPIO_Init(void) { + GPIO_InitTypeDef GPIO_InitStructure; + + // 使能GPIOE时钟 + RCC_AHB1PeriphClockCmd(MOTOR_IN1_GPIO_CLK, ENABLE); + + // 配置IN1 (PE9) 和 IN2 (PE13) 为输出 + GPIO_InitStructure.GPIO_Pin = MOTOR_IN1_GPIO_PIN | MOTOR_IN2_GPIO_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; // 推挽输出 + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(MOTOR_IN1_GPIO_PORT, &GPIO_InitStructure); + + // 配置FAULTN (PE4) 为输入 + GPIO_InitStructure.GPIO_Pin = MOTOR_FAULT_GPIO_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; // 上拉 + GPIO_Init(MOTOR_FAULT_GPIO_PORT, &GPIO_InitStructure); + + // 初始状态：停止电机 + GPIO_ResetBits(MOTOR_IN1_GPIO_PORT, MOTOR_IN1_GPIO_PIN); + GPIO_ResetBits(MOTOR_IN2_GPIO_PORT, MOTOR_IN2_GPIO_PIN); +} + +// 初始化DRV8832 +void DRV8832_Init(void) { + DRV8832_GPIO_Init(); +} + +//===================================================================================== +// 电机基础控制函数 +void Motor_Control(MotorState state) { + switch(state) { + case MOTOR_STOP: // IN1=0, IN2=0 + GPIO_ResetBits(MOTOR_IN1_GPIO_PORT, MOTOR_IN1_GPIO_PIN); + GPIO_ResetBits(MOTOR_IN2_GPIO_PORT, MOTOR_IN2_GPIO_PIN); + break; + + case MOTOR_FORWARD: // IN1=1, IN2=0 + GPIO_SetBits(MOTOR_IN1_GPIO_PORT, MOTOR_IN1_GPIO_PIN); + GPIO_ResetBits(MOTOR_IN2_GPIO_PORT, MOTOR_IN2_GPIO_PIN); + break; + + case MOTOR_REVERSE: // IN1=0, IN2=1 + GPIO_ResetBits(MOTOR_IN1_GPIO_PORT, MOTOR_IN1_GPIO_PIN); + GPIO_SetBits(MOTOR_IN2_GPIO_PORT, MOTOR_IN2_GPIO_PIN); + break; + + case MOTOR_BRAKE: // IN1=1, IN2=1 + GPIO_SetBits(MOTOR_IN1_GPIO_PORT, MOTOR_IN1_GPIO_PIN); + GPIO_SetBits(MOTOR_IN2_GPIO_PORT, MOTOR_IN2_GPIO_PIN); + break; + } +} + +// 获取故障状态 +uint8_t Motor_GetFaultStatus(void) { + // FAULTN引脚为低电平时表示故障 + if (GPIO_ReadInputDataBit(MOTOR_FAULT_GPIO_PORT, MOTOR_FAULT_GPIO_PIN) == Bit_RESET) { + return 1; // 故障 + } + return 0; // 正常 +} + +// 安全的方向切换（避免电流冲击） +void Motor_SafeDirectionChange(MotorState new_direction) { + // 先刹车 + Motor_Control(MOTOR_BRAKE); + delay_ms(5); // 5ms延迟 + + // 再切换到新方向 + Motor_Control(new_direction); +} + + +// 使用TIM2实现软件PWM +#define PWM_FREQUENCY 20000 // 20kHz PWM频率 +#define PWM_RESOLUTION 100 // 100级调速分辨率 + +static uint8_t pwm_counter = 0; // PWM计数器 + +// 定时器初始化 +void PWM_Timer_Init(void) { + TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + // 使能TIM2时钟 + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); + + // 定时器基础配置 + TIM_TimeBaseStructure.TIM_Period = (SystemCoreClock / (2 * PWM_FREQUENCY)) - 1; // 168MHz/2/20kHz + TIM_TimeBaseStructure.TIM_Prescaler = 0; + TIM_TimeBaseStructure.TIM_ClockDivision = 0; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); + + // 使能定时器更新中断 + TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE); + + // 配置NVIC + NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + // 启动定时器 + TIM_Cmd(TIM2, ENABLE); +} + +// 定时器中断处理函数 +void TIM2_IRQHandler(void) { + if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) { + TIM_ClearITPendingBit(TIM2, TIM_IT_Update); + + pwm_counter++; + if (pwm_counter >= PWM_RESOLUTION) { + pwm_counter = 0; + } + + // 根据占空比和方向控制电机 + if (motor_dir == MOTOR_FORWARD) { + if (pwm_counter < pwm_duty) { + // 正转：IN1=1, IN2=0 + GPIO_SetBits(MOTOR_IN1_GPIO_PORT, MOTOR_IN1_GPIO_PIN); + GPIO_ResetBits(MOTOR_IN2_GPIO_PORT, MOTOR_IN2_GPIO_PIN); + } else { + // 停止（滑行） + GPIO_ResetBits(MOTOR_IN1_GPIO_PORT, MOTOR_IN1_GPIO_PIN); + GPIO_ResetBits(MOTOR_IN2_GPIO_PORT, MOTOR_IN2_GPIO_PIN); + } + } + else if (motor_dir == MOTOR_REVERSE) { + if (pwm_counter < pwm_duty) { + // 反转：IN1=0, IN2=1 + GPIO_ResetBits(MOTOR_IN1_GPIO_PORT, MOTOR_IN1_GPIO_PIN); + GPIO_SetBits(MOTOR_IN2_GPIO_PORT, MOTOR_IN2_GPIO_PIN); + } else { + // 停止（滑行） + GPIO_ResetBits(MOTOR_IN1_GPIO_PORT, MOTOR_IN1_GPIO_PIN); + GPIO_ResetBits(MOTOR_IN2_GPIO_PORT, MOTOR_IN2_GPIO_PIN); + } + } + else { + // 停止状态 + GPIO_ResetBits(MOTOR_IN1_GPIO_PORT, MOTOR_IN1_GPIO_PIN); + GPIO_ResetBits(MOTOR_IN2_GPIO_PORT, MOTOR_IN2_GPIO_PIN); + } + } +} + +// 设置电机速度和方向 +void Motor_SetSpeed(uint8_t speed, MotorState direction) { + // 限制速度范围 + if (speed > 100) speed = 100; + + // 如果速度为0或100%，直接使用基础控制 + if (speed == 0) { + motor_dir = MOTOR_STOP; + pwm_duty = 0; + Motor_Control(MOTOR_STOP); + } + else if (speed == 100) { + motor_dir = direction; + pwm_duty = 100; + Motor_Control(direction); + } + else { + // 设置PWM参数 + motor_dir = direction; + pwm_duty = speed; // 直接使用百分比 + } +} diff --git a/HARDWARE/MOTOR/motor_driver.h b/HARDWARE/MOTOR/motor_driver.h new file mode 100644 index 0000000..039eb27 --- /dev/null +++ b/HARDWARE/MOTOR/motor_driver.h @@ -0,0 +1,38 @@ +// motor_driver.h +#ifndef __MOTOR_DRIVER_H +#define __MOTOR_DRIVER_H + +#include "stm32f4xx.h" +#include "stm32f4xx_gpio.h" +#include "stm32f4xx_rcc.h" +#include "stm32f4xx_tim.h" + +// 引脚定义 +#define MOTOR_IN1_GPIO_PORT GPIOE +#define MOTOR_IN1_GPIO_PIN GPIO_Pin_9 +#define MOTOR_IN1_GPIO_CLK RCC_AHB1Periph_GPIOE + +#define MOTOR_IN2_GPIO_PORT GPIOE +#define MOTOR_IN2_GPIO_PIN GPIO_Pin_13 +#define MOTOR_IN2_GPIO_CLK RCC_AHB1Periph_GPIOE + +#define MOTOR_FAULT_GPIO_PORT GPIOE +#define MOTOR_FAULT_GPIO_PIN GPIO_Pin_4 +#define MOTOR_FAULT_GPIO_CLK RCC_AHB1Periph_GPIOE + +// 电机状态 +typedef enum { + MOTOR_STOP = 0, // 停止（滑行） + MOTOR_FORWARD, // 正转 + MOTOR_REVERSE, // 反转 + MOTOR_BRAKE // 刹车 +} MotorState; + +// 函数声明 +void DRV8832_Init(void); +void Motor_Control(MotorState state); +uint8_t Motor_GetFaultStatus(void); +void Motor_SetSpeed(uint8_t speed, MotorState direction); +void PWM_Timer_Init(void); + +#endif /* __MOTOR_DRIVER_H */ \ No newline at end of file diff --git a/HARDWARE/TIMER/timer.c b/HARDWARE/TIMER/timer.c index 0d912cb..5f49b91 100644 --- a/HARDWARE/TIMER/timer.c +++ b/HARDWARE/TIMER/timer.c @@ -96,72 +96,72 @@ extern u16 real_dis_data_bak[6]; extern u8 double_buffer_flag; //定时器3中断服务函数 -void TIM2_IRQHandler(void) -{ - char vcm_cmd[16]; - if(TIM_GetITStatus(TIM2,TIM_IT_Update)==SET) //溢出中断 - { +//void TIM2_IRQHandler(void) +//{ +// char vcm_cmd[16]; +// if(TIM_GetITStatus(TIM2,TIM_IT_Update)==SET) //溢出中断 +// { -#if 1 - if(led_flag == 0) - { - GPIO_SetBits(GPIOE, GPIO_Pin_0); - led_flag = 1; - TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除中断标志位 - return; - } - if(led_flag == 1) - { - GPIO_ResetBits(GPIOE, GPIO_Pin_0); - led_flag = 0; - TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除中断标志位 - return; - } -#endif -#if 0 - sprintf(vcm_cmd,VCM_DISPLACE_CMD,real_dis_data[index]); - usart_send(USART3, vcm_cmd); - usart_send(USART3, START_MACRO_NUM); - TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除中断标志位 - return; - -#endif -#if 0 - if(led_flag == 0) - { - sprintf(vcm_cmd,VCM_DISPLACE_CMD,real_dis_data[index]); - usart_send(USART3, vcm_cmd); - usart_send(USART3, START_MACRO_NUM); - index++; - TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除中断标志位 - return; - } - if(led_flag == 1) - { - sprintf(vcm_cmd,VCM_DISPLACE_CMD,real_dis_data_bak[index]); - usart_send(USART3, vcm_cmd); - usart_send(USART3, START_MACRO_NUM); - TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除中断标志位 - return; - } - if(index > 199 && led_flag == 0) - { - index = 0; - led_flag = 1; - double_buffer_flag = 0; - usart_send(USART1, "laishuju"); - } - if(index > 199 && led_flag == 1) - { - index = 0; - led_flag = 0; - double_buffer_flag = 1; - usart_send(USART1, "laishuju"); - } -#endif - } - -} +//#if 1 +// if(led_flag == 0) +// { +// GPIO_SetBits(GPIOE, GPIO_Pin_0); +// led_flag = 1; +// TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除中断标志位 +// return; +// } +// if(led_flag == 1) +// { +// GPIO_ResetBits(GPIOE, GPIO_Pin_0); +// led_flag = 0; +// TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除中断标志位 +// return; +// } +//#endif +//#if 0 +// sprintf(vcm_cmd,VCM_DISPLACE_CMD,real_dis_data[index]); +// usart_send(USART3, vcm_cmd); +// usart_send(USART3, START_MACRO_NUM); +// TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除中断标志位 +// return; +// +//#endif +//#if 0 +// if(led_flag == 0) +// { +// sprintf(vcm_cmd,VCM_DISPLACE_CMD,real_dis_data[index]); +// usart_send(USART3, vcm_cmd); +// usart_send(USART3, START_MACRO_NUM); +// index++; +// TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除中断标志位 +// return; +// } +// if(led_flag == 1) +// { +// sprintf(vcm_cmd,VCM_DISPLACE_CMD,real_dis_data_bak[index]); +// usart_send(USART3, vcm_cmd); +// usart_send(USART3, START_MACRO_NUM); +// TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除中断标志位 +// return; +// } +// if(index > 199 && led_flag == 0) +// { +// index = 0; +// led_flag = 1; +// double_buffer_flag = 0; +// usart_send(USART1, "laishuju"); +// } +// if(index > 199 && led_flag == 1) +// { +// index = 0; +// led_flag = 0; +// double_buffer_flag = 1; +// usart_send(USART1, "laishuju"); +// } +//#endif +// } +// +//} void TIM2_PWM_Init(u16 arr,u16 psc) diff --git a/OBJ/USART.axf b/OBJ/USART.axf new file mode 100644 index 0000000000000000000000000000000000000000..946f505ceaf7c55b6efede81031378cdc4c174a3 GIT binary patch literal 385444 zcmd?S4`5W)l|O#(doz;(0u1>B5#u-^hyl^&9~do4CX-AOnIz-PM8Ksx1QH=NBr$(5 zwswn(3RW#{ZGUcSTkN{Ky46;#Si7w&ZLPH}wb0sr+peu?Yq$2#Zlh9(g5>u(_s@H8 z{shn{^8Nh=Uf#Xuo_p>&=bn4+pLgGVA8m+)Ip<9O3|7V{wv#ij>jgJkh|6HiUCjc3 zmoXok&33q0;Il~oo5{S5xK`o%J>q>n=GAoco#!xbyCLEK<6_>^yv+Mm;GWED@igXr z6W0W;$;w@v%e+6tb=AztaVE=q7V@2qYqIpW0xz6(;&fgZ&)v_)ipE(JYh0Yiyi_lq zrfrQL#E&Qjc7byf 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z<7(b@^KaPLi&f8KRG$5r_1fI%oPDw|%SQ0}xiwWC)44U$&%3pHb8A%Vuj1CY+U%>% za+~3sy|1RWIUcmH7LF!Tb8HEpe`}j%BY6G1nyQZJyc+4}y;{9_HLCSj@oHQx=Ghqk zY1FL)VK%fAzr@*rgAo5c8z(U`QgkO2rHhH2tAKudN*!ZynkUC^A1QGzk<_gUm634- zfS*Ih?;e#CBls>C`S*Apzrhwtil1wOcuXpgyaxP5MKTxTYw^AnjO|~^*jpI8hy*kJ zP&o8=h&W*}g?TE%QlEwLUCQzg{w{vV|55Q?1VWqeK2H`GF*FnJqf&YqB + +
+
礦ision Build Log

+
Tool Versions:

+IDE-Version: μVision V5.38.0.0
+Copyright (C) 2022 ARM Ltd and ARM Germany GmbH. All rights reserved.
+License Information: baibaila3 baibaila3@163.com, keil, LIC=47GU5-GE5WI-JJF6S-L5PAY-BRK7N-23XAJ
+ 
+Tool Versions:
+Toolchain:       MDK-ARM Plus  Version: 5.22
+Toolchain Path:  C:\Keil_v5\ARM\ARMCC\Bin
+C Compiler:      Armcc.exe V5.06 update 4 (build 422)
+Assembler:       Armasm.exe V5.06 update 4 (build 422)
+Linker/Locator:  ArmLink.exe V5.06 update 4 (build 422)
+Library Manager: ArmAr.exe V5.06 update 4 (build 422)
+Hex Converter:   FromElf.exe V5.06 update 4 (build 422)
+CPU DLL:         SARMCM3.DLL V5.22
+Dialog DLL:      DCM.DLL V1.13.9.0
+Target DLL:      STLink\ST-LINKIII-KEIL_SWO.dll V2.0.18.0
+Dialog DLL:      TCM.DLL V1.21.0.0
+ 
+
Project:

+E:\CGY_2026\GIT\sensor_2026\USER\USART.uvprojx
+Project File Date:  02/11/2026
+
+
Output:

+*** Using Compiler 'V5.06 update 4 (build 422)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
+Build target 'USART'
+"..\OBJ\USART.axf" - 0 Error(s), 0 Warning(s).
+
+
Software Packages used:

+
+Package Vendor: Keil
+                http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.11.0.pack
+                Keil.STM32F4xx_DFP.2.11.0
+                STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
+
+
Collection of Component include folders:

+  C:/Keil_v5/ARM/PACK/Keil/STM32F4xx_DFP/2.11.0/Drivers/CMSIS/Device/ST/STM32F4xx/Include
+
+
Collection of Component Files used:

+Build Time Elapsed:  00:00:01
+
+ + diff --git a/OBJ/USART.htm b/OBJ/USART.htm new file mode 100644 index 0000000..33f9c3b --- /dev/null +++ b/OBJ/USART.htm @@ -0,0 +1,974 @@ + + +Static Call Graph - [..\OBJ\USART.axf] +
+

Static Call Graph for image ..\OBJ\USART.axf

+

#<CALLGRAPH># ARM Linker, 5060422: Last Updated: Wed Feb 11 01:11:29 2026 +

+

Maximum Stack Usage = 124 bytes + Unknown(Cycles, Untraceable Function Pointers)

+Call chain for Maximum Stack Depth:

+main ⇒ uart6_init ⇒ USART_Init ⇒ RCC_GetClocksFreq +

+

+Mutually Recursive functions +

  • ADC_IRQHandler   ⇒   ADC_IRQHandler
    + +

    +

    +Function Pointers +

      +
    • ADC_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • BusFault_Handler from stm32f4xx_it.o(i.BusFault_Handler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • CAN1_RX0_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • CAN1_RX1_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • CAN1_SCE_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • CAN1_TX_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • CAN2_RX0_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • CAN2_RX1_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • CAN2_SCE_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • CAN2_TX_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • CRYP_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DCMI_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA1_Stream0_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA1_Stream1_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA1_Stream2_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA1_Stream3_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA1_Stream4_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA1_Stream5_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA1_Stream6_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA1_Stream7_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA2_Stream0_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA2_Stream1_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA2_Stream2_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA2_Stream3_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA2_Stream4_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA2_Stream5_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA2_Stream6_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DMA2_Stream7_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • DebugMon_Handler from stm32f4xx_it.o(i.DebugMon_Handler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • ETH_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • ETH_WKUP_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • EXTI0_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • EXTI15_10_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • EXTI1_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • EXTI2_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • EXTI3_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • EXTI4_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • EXTI9_5_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • FLASH_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • FPU_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • FSMC_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • HASH_RNG_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • HardFault_Handler from stm32f4xx_it.o(i.HardFault_Handler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • I2C1_ER_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • I2C1_EV_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • I2C2_ER_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • I2C2_EV_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • I2C3_ER_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • I2C3_EV_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • MemManage_Handler from stm32f4xx_it.o(i.MemManage_Handler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • NMI_Handler from stm32f4xx_it.o(i.NMI_Handler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • OTG_FS_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • OTG_FS_WKUP_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • OTG_HS_EP1_IN_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • OTG_HS_EP1_OUT_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • OTG_HS_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • OTG_HS_WKUP_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • PVD_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • PendSV_Handler from stm32f4xx_it.o(i.PendSV_Handler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • RCC_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • RTC_Alarm_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • RTC_WKUP_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • Reset_Handler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • SDIO_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • SPI1_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • SPI2_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • SPI3_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • SVC_Handler from stm32f4xx_it.o(i.SVC_Handler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • SysTick_Handler from stm32f4xx_it.o(i.SysTick_Handler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • SystemInit from system_stm32f4xx.o(i.SystemInit) referenced from startup_stm32f40_41xxx.o(.text) +
    • TAMP_STAMP_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM1_BRK_TIM9_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM1_CC_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM1_TRG_COM_TIM11_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM1_UP_TIM10_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM2_IRQHandler from motor_driver.o(i.TIM2_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM3_IRQHandler from timer.o(i.TIM3_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM4_IRQHandler from timer.o(i.TIM4_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM5_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM6_DAC_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM7_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM8_BRK_TIM12_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM8_CC_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM8_TRG_COM_TIM14_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • TIM8_UP_TIM13_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • UART4_IRQHandler from usart.o(i.UART4_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • UART5_IRQHandler from usart.o(i.UART5_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • USART1_IRQHandler from usart.o(i.USART1_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • USART2_IRQHandler from usart.o(i.USART2_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • USART3_IRQHandler from usart.o(i.USART3_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • USART6_IRQHandler from usart.o(i.USART6_IRQHandler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • UsageFault_Handler from stm32f4xx_it.o(i.UsageFault_Handler) referenced from startup_stm32f40_41xxx.o(RESET) +
    • WWDG_IRQHandler from startup_stm32f40_41xxx.o(.text) referenced from startup_stm32f40_41xxx.o(RESET) +
    • __main from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f40_41xxx.o(.text) +
    • main from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B) +
    +

    +

    +Global Symbols +

    +

    __main (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(.text) +
    +

    _main_stk (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001)) + +

    _main_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004)) +

    [Calls]

    • >>   __scatterload +
    + +

    __main_after_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004)) +

    [Called By]

    • >>   __scatterload +
    + +

    _main_clock (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008)) + +

    _main_cpp_init (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A)) + +

    _main_init (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B)) + +

    __rt_final_cpp (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D)) + +

    __rt_final_exit (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F)) + +

    Reset_Handler (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    ADC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +

    [Calls]

    • >>   ADC_IRQHandler +
    +
    [Called By]
    • >>   ADC_IRQHandler +
    +
    [Address Reference Count : 1]
    • startup_stm32f40_41xxx.o(RESET) +
    +

    CAN1_RX0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    CAN1_RX1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    CAN1_SCE_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    CAN1_TX_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    CAN2_RX0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    CAN2_RX1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    CAN2_SCE_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    CAN2_TX_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    CRYP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DCMI_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA1_Stream0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA1_Stream1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA1_Stream2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA1_Stream3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA1_Stream4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA1_Stream5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA1_Stream6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA1_Stream7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA2_Stream0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA2_Stream1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA2_Stream2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA2_Stream3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA2_Stream4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA2_Stream5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA2_Stream6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DMA2_Stream7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    ETH_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    ETH_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    EXTI0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    EXTI15_10_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    EXTI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    EXTI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    EXTI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    EXTI4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    EXTI9_5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    FLASH_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    FPU_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    FSMC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    HASH_RNG_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    I2C1_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    I2C1_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    I2C2_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    I2C2_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    I2C3_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    I2C3_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    OTG_FS_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    OTG_FS_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    OTG_HS_EP1_IN_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    OTG_HS_EP1_OUT_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    OTG_HS_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    OTG_HS_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    PVD_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    RCC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    RTC_Alarm_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    RTC_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    SDIO_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    SPI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    SPI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    SPI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TAMP_STAMP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM1_BRK_TIM9_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM1_CC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM1_TRG_COM_TIM11_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM1_UP_TIM10_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM6_DAC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM8_BRK_TIM12_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM8_CC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM8_TRG_COM_TIM14_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM8_UP_TIM13_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    WWDG_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40_41xxx.o(.text)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    __scatterload (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text)) +

    [Calls]

    • >>   __main_after_scatterload +
    +
    [Called By]
    • >>   _main_scatterload +
    + +

    __scatterload_rt2 (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED) + +

    BusFault_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.BusFault_Handler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    DRV8832_GPIO_Init (Thumb, 94 bytes, Stack size 16 bytes, motor_driver.o(i.DRV8832_GPIO_Init)) +

    [Stack]

    • Max Depth = 36
    • Call Chain = DRV8832_GPIO_Init ⇒ GPIO_Init +
    +
    [Calls]
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    • >>   GPIO_ResetBits +
    +
    [Called By]
    • >>   DRV8832_Init +
    + +

    DRV8832_Init (Thumb, 8 bytes, Stack size 8 bytes, motor_driver.o(i.DRV8832_Init)) +

    [Stack]

    • Max Depth = 44
    • Call Chain = DRV8832_Init ⇒ DRV8832_GPIO_Init ⇒ GPIO_Init +
    +
    [Calls]
    • >>   DRV8832_GPIO_Init +
    +
    [Called By]
    • >>   main +
    + +

    DebugMon_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.DebugMon_Handler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    GPIO_Init (Thumb, 144 bytes, Stack size 20 bytes, stm32f4xx_gpio.o(i.GPIO_Init)) +

    [Stack]

    • Max Depth = 20
    • Call Chain = GPIO_Init +
    +
    [Called By]
    • >>   uart6_init +
    • >>   uart4_init +
    • >>   uart3_init +
    • >>   uart2_init +
    • >>   uart1_init +
    • >>   motor_spi2_init +
    • >>   motor_spi1_init +
    • >>   gpio_Init +
    • >>   TIM4_PWM_Init +
    • >>   TIM1_PWM_Init +
    • >>   DRV8832_GPIO_Init +
    + +

    GPIO_PinAFConfig (Thumb, 70 bytes, Stack size 20 bytes, stm32f4xx_gpio.o(i.GPIO_PinAFConfig)) +

    [Stack]

    • Max Depth = 20
    • Call Chain = GPIO_PinAFConfig +
    +
    [Called By]
    • >>   uart6_init +
    • >>   uart4_init +
    • >>   uart3_init +
    • >>   uart2_init +
    • >>   uart1_init +
    • >>   motor_spi2_init +
    • >>   motor_spi1_init +
    • >>   TIM4_PWM_Init +
    • >>   TIM1_PWM_Init +
    + +

    GPIO_ReadInputDataBit (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_ReadInputDataBit)) +

    [Called By]

    • >>   Motor_GetFaultStatus +
    + +

    GPIO_ResetBits (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_ResetBits)) +

    [Called By]

    • >>   TIM4_PWM_Init +
    • >>   TIM1_PWM_Init +
    • >>   Motor_Control +
    • >>   TIM2_IRQHandler +
    • >>   DRV8832_GPIO_Init +
    + +

    GPIO_SetBits (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_SetBits)) +

    [Called By]

    • >>   Motor_Control +
    • >>   TIM2_IRQHandler +
    + +

    HardFault_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.HardFault_Handler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    MemManage_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.MemManage_Handler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    Motor_Control (Thumb, 112 bytes, Stack size 8 bytes, motor_driver.o(i.Motor_Control)) +

    [Stack]

    • Max Depth = 8
    • Call Chain = Motor_Control +
    +
    [Calls]
    • >>   GPIO_SetBits +
    • >>   GPIO_ResetBits +
    +
    [Called By]
    • >>   Motor_SafeDirectionChange +
    • >>   main +
    + +

    Motor_GetFaultStatus (Thumb, 20 bytes, Stack size 8 bytes, motor_driver.o(i.Motor_GetFaultStatus)) +

    [Stack]

    • Max Depth = 8
    • Call Chain = Motor_GetFaultStatus +
    +
    [Calls]
    • >>   GPIO_ReadInputDataBit +
    +
    [Called By]
    • >>   main +
    + +

    Motor_SafeDirectionChange (Thumb, 24 bytes, Stack size 8 bytes, motor_driver.o(i.Motor_SafeDirectionChange)) +

    [Stack]

    • Max Depth = 24
    • Call Chain = Motor_SafeDirectionChange ⇒ delay_ms +
    +
    [Calls]
    • >>   delay_ms +
    • >>   Motor_Control +
    +
    [Called By]
    • >>   main +
    + +

    NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.NMI_Handler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    NVIC_Init (Thumb, 106 bytes, Stack size 16 bytes, misc.o(i.NVIC_Init)) +

    [Stack]

    • Max Depth = 16
    • Call Chain = NVIC_Init +
    +
    [Called By]
    • >>   uart6_init +
    • >>   uart4_init +
    • >>   uart3_init +
    • >>   uart2_init +
    • >>   uart1_init +
    • >>   PWM_Timer_Init +
    + +

    NVIC_PriorityGroupConfig (Thumb, 10 bytes, Stack size 0 bytes, misc.o(i.NVIC_PriorityGroupConfig)) +

    [Called By]

    • >>   main +
    + +

    PWM_Timer_Init (Thumb, 98 bytes, Stack size 24 bytes, motor_driver.o(i.PWM_Timer_Init)) +

    [Stack]

    • Max Depth = 40
    • Call Chain = PWM_Timer_Init ⇒ NVIC_Init +
    +
    [Calls]
    • >>   TIM_Cmd +
    • >>   TIM_TimeBaseInit +
    • >>   TIM_ITConfig +
    • >>   RCC_APB1PeriphClockCmd +
    • >>   NVIC_Init +
    +
    [Called By]
    • >>   main +
    + +

    PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.PendSV_Handler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    RCC_AHB1PeriphClockCmd (Thumb, 26 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_AHB1PeriphClockCmd)) +

    [Called By]

    • >>   uart6_init +
    • >>   uart4_init +
    • >>   uart3_init +
    • >>   uart2_init +
    • >>   uart1_init +
    • >>   motor_spi2_init +
    • >>   motor_spi1_init +
    • >>   gpio_Init +
    • >>   TIM4_PWM_Init +
    • >>   TIM1_PWM_Init +
    • >>   DRV8832_GPIO_Init +
    + +

    RCC_APB1PeriphClockCmd (Thumb, 26 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd)) +

    [Called By]

    • >>   uart4_init +
    • >>   uart3_init +
    • >>   uart2_init +
    • >>   TIM4_PWM_Init +
    • >>   PWM_Timer_Init +
    + +

    RCC_APB2PeriphClockCmd (Thumb, 26 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB2PeriphClockCmd)) +

    [Called By]

    • >>   uart6_init +
    • >>   uart1_init +
    • >>   motor_spi2_init +
    • >>   motor_spi1_init +
    • >>   TIM1_PWM_Init +
    + +

    RCC_APB2PeriphResetCmd (Thumb, 26 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB2PeriphResetCmd)) +

    [Called By]

    • >>   motor_spi2_init +
    • >>   motor_spi1_init +
    + +

    RCC_GetClocksFreq (Thumb, 214 bytes, Stack size 20 bytes, stm32f4xx_rcc.o(i.RCC_GetClocksFreq)) +

    [Stack]

    • Max Depth = 20
    • Call Chain = RCC_GetClocksFreq +
    +
    [Called By]
    • >>   USART_Init +
    + +

    SPI1_ReadWriteByte (Thumb, 50 bytes, Stack size 8 bytes, spi.o(i.SPI1_ReadWriteByte)) +

    [Stack]

    • Max Depth = 8
    • Call Chain = SPI1_ReadWriteByte +
    +
    [Calls]
    • >>   SPI_I2S_SendData +
    • >>   SPI_I2S_ReceiveData +
    • >>   SPI_I2S_GetFlagStatus +
    +
    [Called By]
    • >>   motor_spi2_init +
    • >>   motor_spi1_init +
    + +

    SPI_Cmd (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_spi.o(i.SPI_Cmd)) +

    [Called By]

    • >>   motor_spi2_init +
    • >>   motor_spi1_init +
    + +

    SPI_I2S_GetFlagStatus (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_spi.o(i.SPI_I2S_GetFlagStatus)) +

    [Called By]

    • >>   SPI1_ReadWriteByte +
    + +

    SPI_I2S_ReceiveData (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_spi.o(i.SPI_I2S_ReceiveData)) +

    [Called By]

    • >>   SPI1_ReadWriteByte +
    + +

    SPI_I2S_SendData (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_spi.o(i.SPI_I2S_SendData)) +

    [Called By]

    • >>   SPI1_ReadWriteByte +
    + +

    SPI_Init (Thumb, 60 bytes, Stack size 8 bytes, stm32f4xx_spi.o(i.SPI_Init)) +

    [Stack]

    • Max Depth = 8
    • Call Chain = SPI_Init +
    +
    [Called By]
    • >>   motor_spi2_init +
    • >>   motor_spi1_init +
    + +

    SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.SVC_Handler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    SysTick_CLKSourceConfig (Thumb, 40 bytes, Stack size 0 bytes, misc.o(i.SysTick_CLKSourceConfig)) +

    [Called By]

    • >>   delay_init +
    + +

    SysTick_Handler (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.SysTick_Handler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    SystemInit (Thumb, 88 bytes, Stack size 8 bytes, system_stm32f4xx.o(i.SystemInit)) +

    [Stack]

    • Max Depth = 20
    • Call Chain = SystemInit ⇒ SetSysClock +
    +
    [Calls]
    • >>   SetSysClock +
    +
    [Address Reference Count : 1]
    • startup_stm32f40_41xxx.o(.text) +
    +

    TIM1_PWM_Init (Thumb, 156 bytes, Stack size 56 bytes, timer.o(i.TIM1_PWM_Init)) +

    [Stack]

    • Max Depth = 76
    • Call Chain = TIM1_PWM_Init ⇒ GPIO_Init +
    +
    [Calls]
    • >>   RCC_APB2PeriphClockCmd +
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    • >>   GPIO_ResetBits +
    • >>   TIM_TimeBaseInit +
    • >>   TIM_OC1PreloadConfig +
    • >>   TIM_OC1Init +
    • >>   TIM_ARRPreloadConfig +
    • >>   GPIO_PinAFConfig +
    +
    [Called By]
    • >>   main +
    + +

    TIM2_IRQHandler (Thumb, 194 bytes, Stack size 8 bytes, motor_driver.o(i.TIM2_IRQHandler)) +

    [Stack]

    • Max Depth = 20
    • Call Chain = TIM2_IRQHandler ⇒ TIM_GetITStatus +
    +
    [Calls]
    • >>   GPIO_SetBits +
    • >>   GPIO_ResetBits +
    • >>   TIM_GetITStatus +
    • >>   TIM_ClearITPendingBit +
    +
    [Address Reference Count : 1]
    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM3_IRQHandler (Thumb, 2 bytes, Stack size 0 bytes, timer.o(i.TIM3_IRQHandler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM4_IRQHandler (Thumb, 2 bytes, Stack size 0 bytes, timer.o(i.TIM4_IRQHandler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    TIM4_PWM_Init (Thumb, 156 bytes, Stack size 56 bytes, timer.o(i.TIM4_PWM_Init)) +

    [Stack]

    • Max Depth = 76
    • Call Chain = TIM4_PWM_Init ⇒ GPIO_Init +
    +
    [Calls]
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    • >>   GPIO_ResetBits +
    • >>   TIM_TimeBaseInit +
    • >>   TIM_OC1PreloadConfig +
    • >>   TIM_OC1Init +
    • >>   TIM_ARRPreloadConfig +
    • >>   RCC_APB1PeriphClockCmd +
    • >>   GPIO_PinAFConfig +
    +
    [Called By]
    • >>   main +
    + +

    TIM_ARRPreloadConfig (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ARRPreloadConfig)) +

    [Called By]

    • >>   TIM4_PWM_Init +
    • >>   TIM1_PWM_Init +
    + +

    TIM_ClearITPendingBit (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ClearITPendingBit)) +

    [Called By]

    • >>   TIM2_IRQHandler +
    + +

    TIM_Cmd (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_Cmd)) +

    [Called By]

    • >>   PWM_Timer_Init +
    • >>   main +
    + +

    TIM_GetITStatus (Thumb, 34 bytes, Stack size 12 bytes, stm32f4xx_tim.o(i.TIM_GetITStatus)) +

    [Stack]

    • Max Depth = 12
    • Call Chain = TIM_GetITStatus +
    +
    [Called By]
    • >>   TIM2_IRQHandler +
    + +

    TIM_ITConfig (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_ITConfig)) +

    [Called By]

    • >>   PWM_Timer_Init +
    + +

    TIM_OC1Init (Thumb, 114 bytes, Stack size 16 bytes, stm32f4xx_tim.o(i.TIM_OC1Init)) +

    [Stack]

    • Max Depth = 16
    • Call Chain = TIM_OC1Init +
    +
    [Called By]
    • >>   TIM4_PWM_Init +
    • >>   TIM1_PWM_Init +
    + +

    TIM_OC1PreloadConfig (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_OC1PreloadConfig)) +

    [Called By]

    • >>   TIM4_PWM_Init +
    • >>   TIM1_PWM_Init +
    + +

    TIM_TimeBaseInit (Thumb, 104 bytes, Stack size 0 bytes, stm32f4xx_tim.o(i.TIM_TimeBaseInit)) +

    [Called By]

    • >>   TIM4_PWM_Init +
    • >>   TIM1_PWM_Init +
    • >>   PWM_Timer_Init +
    + +

    UART4_IRQHandler (Thumb, 2 bytes, Stack size 0 bytes, usart.o(i.UART4_IRQHandler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    UART5_IRQHandler (Thumb, 2 bytes, Stack size 0 bytes, usart.o(i.UART5_IRQHandler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    USART1_IRQHandler (Thumb, 144 bytes, Stack size 8 bytes, usart.o(i.USART1_IRQHandler)) +

    [Stack]

    • Max Depth = 24
    • Call Chain = USART1_IRQHandler ⇒ USART_GetITStatus +
    +
    [Calls]
    • >>   USART_ReceiveData +
    • >>   USART_GetITStatus +
    • >>   USART_ClearITPendingBit +
    +
    [Address Reference Count : 1]
    • startup_stm32f40_41xxx.o(RESET) +
    +

    USART2_IRQHandler (Thumb, 144 bytes, Stack size 8 bytes, usart.o(i.USART2_IRQHandler)) +

    [Stack]

    • Max Depth = 24
    • Call Chain = USART2_IRQHandler ⇒ USART_GetITStatus +
    +
    [Calls]
    • >>   USART_ReceiveData +
    • >>   USART_GetITStatus +
    • >>   USART_ClearITPendingBit +
    +
    [Address Reference Count : 1]
    • startup_stm32f40_41xxx.o(RESET) +
    +

    USART3_IRQHandler (Thumb, 144 bytes, Stack size 8 bytes, usart.o(i.USART3_IRQHandler)) +

    [Stack]

    • Max Depth = 24
    • Call Chain = USART3_IRQHandler ⇒ USART_GetITStatus +
    +
    [Calls]
    • >>   USART_ReceiveData +
    • >>   USART_GetITStatus +
    • >>   USART_ClearITPendingBit +
    +
    [Address Reference Count : 1]
    • startup_stm32f40_41xxx.o(RESET) +
    +

    USART6_IRQHandler (Thumb, 144 bytes, Stack size 8 bytes, usart.o(i.USART6_IRQHandler)) +

    [Stack]

    • Max Depth = 24
    • Call Chain = USART6_IRQHandler ⇒ USART_GetITStatus +
    +
    [Calls]
    • >>   USART_ReceiveData +
    • >>   USART_GetITStatus +
    • >>   USART_ClearITPendingBit +
    +
    [Address Reference Count : 1]
    • startup_stm32f40_41xxx.o(RESET) +
    +

    USART_ClearITPendingBit (Thumb, 30 bytes, Stack size 8 bytes, stm32f4xx_usart.o(i.USART_ClearITPendingBit)) +

    [Stack]

    • Max Depth = 8
    • Call Chain = USART_ClearITPendingBit +
    +
    [Called By]
    • >>   USART6_IRQHandler +
    • >>   USART3_IRQHandler +
    • >>   USART2_IRQHandler +
    • >>   USART1_IRQHandler +
    + +

    USART_Cmd (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_Cmd)) +

    [Called By]

    • >>   uart6_init +
    • >>   uart4_init +
    • >>   uart3_init +
    • >>   uart2_init +
    • >>   uart1_init +
    + +

    USART_GetITStatus (Thumb, 84 bytes, Stack size 16 bytes, stm32f4xx_usart.o(i.USART_GetITStatus)) +

    [Stack]

    • Max Depth = 16
    • Call Chain = USART_GetITStatus +
    +
    [Called By]
    • >>   USART6_IRQHandler +
    • >>   USART3_IRQHandler +
    • >>   USART2_IRQHandler +
    • >>   USART1_IRQHandler +
    + +

    USART_ITConfig (Thumb, 74 bytes, Stack size 20 bytes, stm32f4xx_usart.o(i.USART_ITConfig)) +

    [Stack]

    • Max Depth = 20
    • Call Chain = USART_ITConfig +
    +
    [Called By]
    • >>   uart6_init +
    • >>   uart4_init +
    • >>   uart3_init +
    • >>   uart2_init +
    • >>   uart1_init +
    + +

    USART_Init (Thumb, 204 bytes, Stack size 48 bytes, stm32f4xx_usart.o(i.USART_Init)) +

    [Stack]

    • Max Depth = 68
    • Call Chain = USART_Init ⇒ RCC_GetClocksFreq +
    +
    [Calls]
    • >>   RCC_GetClocksFreq +
    +
    [Called By]
    • >>   uart6_init +
    • >>   uart4_init +
    • >>   uart3_init +
    • >>   uart2_init +
    • >>   uart1_init +
    + +

    USART_ReceiveData (Thumb, 10 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_ReceiveData)) +

    [Called By]

    • >>   USART6_IRQHandler +
    • >>   USART3_IRQHandler +
    • >>   USART2_IRQHandler +
    • >>   USART1_IRQHandler +
    + +

    UsageFault_Handler (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.UsageFault_Handler)) +
    [Address Reference Count : 1]

    • startup_stm32f40_41xxx.o(RESET) +
    +

    __scatterload_copy (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED) + +

    __scatterload_null (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED) + +

    __scatterload_zeroinit (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED) + +

    delay_init (Thumb, 52 bytes, Stack size 8 bytes, delay.o(i.delay_init)) +

    [Stack]

    • Max Depth = 8
    • Call Chain = delay_init +
    +
    [Calls]
    • >>   SysTick_CLKSourceConfig +
    +
    [Called By]
    • >>   main +
    + +

    delay_ms (Thumb, 56 bytes, Stack size 16 bytes, delay.o(i.delay_ms)) +

    [Stack]

    • Max Depth = 16
    • Call Chain = delay_ms +
    +
    [Calls]
    • >>   delay_xms +
    +
    [Called By]
    • >>   Motor_SafeDirectionChange +
    • >>   main +
    + +

    delay_xms (Thumb, 72 bytes, Stack size 0 bytes, delay.o(i.delay_xms)) +

    [Called By]

    • >>   delay_ms +
    + +

    gpio_Init (Thumb, 200 bytes, Stack size 16 bytes, led.o(i.gpio_Init)) +

    [Stack]

    • Max Depth = 36
    • Call Chain = gpio_Init ⇒ GPIO_Init +
    +
    [Calls]
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    +
    [Called By]
    • >>   main +
    + +

    main (Thumb, 208 bytes, Stack size 16 bytes, main.o(i.main)) +

    [Stack]

    • Max Depth = 124
    • Call Chain = main ⇒ uart6_init ⇒ USART_Init ⇒ RCC_GetClocksFreq +
    +
    [Calls]
    • >>   uart6_init +
    • >>   uart4_init +
    • >>   uart3_init +
    • >>   uart2_init +
    • >>   uart1_init +
    • >>   motor_spi2_init +
    • >>   motor_spi1_init +
    • >>   gpio_Init +
    • >>   delay_ms +
    • >>   delay_init +
    • >>   TIM_Cmd +
    • >>   TIM4_PWM_Init +
    • >>   TIM1_PWM_Init +
    • >>   PWM_Timer_Init +
    • >>   NVIC_PriorityGroupConfig +
    • >>   Motor_SafeDirectionChange +
    • >>   Motor_GetFaultStatus +
    • >>   Motor_Control +
    • >>   DRV8832_Init +
    +
    [Address Reference Count : 1]
    • entry9a.o(.ARM.Collect$$$$0000000B) +
    +

    motor_spi1_init (Thumb, 186 bytes, Stack size 32 bytes, spi.o(i.motor_spi1_init)) +

    [Stack]

    • Max Depth = 52
    • Call Chain = motor_spi1_init ⇒ GPIO_Init +
    +
    [Calls]
    • >>   RCC_APB2PeriphResetCmd +
    • >>   RCC_APB2PeriphClockCmd +
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    • >>   SPI_Init +
    • >>   SPI_Cmd +
    • >>   SPI1_ReadWriteByte +
    • >>   GPIO_PinAFConfig +
    +
    [Called By]
    • >>   main +
    + +

    motor_spi2_init (Thumb, 232 bytes, Stack size 32 bytes, spi.o(i.motor_spi2_init)) +

    [Stack]

    • Max Depth = 52
    • Call Chain = motor_spi2_init ⇒ GPIO_Init +
    +
    [Calls]
    • >>   RCC_APB2PeriphResetCmd +
    • >>   RCC_APB2PeriphClockCmd +
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    • >>   SPI_Init +
    • >>   SPI_Cmd +
    • >>   SPI1_ReadWriteByte +
    • >>   GPIO_PinAFConfig +
    +
    [Called By]
    • >>   main +
    + +

    uart1_init (Thumb, 164 bytes, Stack size 40 bytes, usart.o(i.uart1_init)) +

    [Stack]

    • Max Depth = 108
    • Call Chain = uart1_init ⇒ USART_Init ⇒ RCC_GetClocksFreq +
    +
    [Calls]
    • >>   RCC_APB2PeriphClockCmd +
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    • >>   USART_Init +
    • >>   USART_ITConfig +
    • >>   USART_Cmd +
    • >>   NVIC_Init +
    • >>   GPIO_PinAFConfig +
    +
    [Called By]
    • >>   main +
    + +

    uart2_init (Thumb, 162 bytes, Stack size 40 bytes, usart.o(i.uart2_init)) +

    [Stack]

    • Max Depth = 108
    • Call Chain = uart2_init ⇒ USART_Init ⇒ RCC_GetClocksFreq +
    +
    [Calls]
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    • >>   USART_Init +
    • >>   USART_ITConfig +
    • >>   USART_Cmd +
    • >>   RCC_APB1PeriphClockCmd +
    • >>   NVIC_Init +
    • >>   GPIO_PinAFConfig +
    +
    [Called By]
    • >>   main +
    + +

    uart3_init (Thumb, 164 bytes, Stack size 40 bytes, usart.o(i.uart3_init)) +

    [Stack]

    • Max Depth = 108
    • Call Chain = uart3_init ⇒ USART_Init ⇒ RCC_GetClocksFreq +
    +
    [Calls]
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    • >>   USART_Init +
    • >>   USART_ITConfig +
    • >>   USART_Cmd +
    • >>   RCC_APB1PeriphClockCmd +
    • >>   NVIC_Init +
    • >>   GPIO_PinAFConfig +
    +
    [Called By]
    • >>   main +
    + +

    uart4_init (Thumb, 162 bytes, Stack size 40 bytes, usart.o(i.uart4_init)) +

    [Stack]

    • Max Depth = 108
    • Call Chain = uart4_init ⇒ USART_Init ⇒ RCC_GetClocksFreq +
    +
    [Calls]
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    • >>   USART_Init +
    • >>   USART_ITConfig +
    • >>   USART_Cmd +
    • >>   RCC_APB1PeriphClockCmd +
    • >>   NVIC_Init +
    • >>   GPIO_PinAFConfig +
    +
    [Called By]
    • >>   main +
    + +

    uart6_init (Thumb, 162 bytes, Stack size 40 bytes, usart.o(i.uart6_init)) +

    [Stack]

    • Max Depth = 108
    • Call Chain = uart6_init ⇒ USART_Init ⇒ RCC_GetClocksFreq +
    +
    [Calls]
    • >>   RCC_APB2PeriphClockCmd +
    • >>   RCC_AHB1PeriphClockCmd +
    • >>   GPIO_Init +
    • >>   USART_Init +
    • >>   USART_ITConfig +
    • >>   USART_Cmd +
    • >>   NVIC_Init +
    • >>   GPIO_PinAFConfig +
    +
    [Called By]
    • >>   main +
    +

    +

    +Local Symbols +

    +

    SetSysClock (Thumb, 220 bytes, Stack size 12 bytes, system_stm32f4xx.o(i.SetSysClock)) +

    [Stack]

    • Max Depth = 12
    • Call Chain = SetSysClock +
    +
    [Called By]
    • >>   SystemInit +
    +

    +

    +Undefined Global Symbols +

    diff --git a/OBJ/USART.lnp b/OBJ/USART.lnp new file mode 100644 index 0000000..f909bb0 --- /dev/null +++ b/OBJ/USART.lnp @@ -0,0 +1,28 @@ +--cpu=Cortex-M4.fp.sp +"..\obj\main.o" +"..\obj\stm32f4xx_it.o" +"..\obj\system_stm32f4xx.o" +"..\obj\led.o" +"..\obj\beep.o" +"..\obj\key.o" +"..\obj\adc.o" +"..\obj\elemachinery.o" +"..\obj\timer.o" +"..\obj\spi.o" +"..\obj\motor_driver.o" +"..\obj\delay.o" +"..\obj\sys.o" +"..\obj\usart.o" +"..\obj\startup_stm32f40_41xxx.o" +"..\obj\misc.o" +"..\obj\stm32f4xx_gpio.o" +"..\obj\stm32f4xx_rcc.o" +"..\obj\stm32f4xx_syscfg.o" +"..\obj\stm32f4xx_usart.o" +"..\obj\stm32f4xx_adc.o" +"..\obj\stm32f4xx_tim.o" +"..\obj\stm32f4xx_spi.o" +--library_type=microlib --strict --scatter "..\OBJ\USART.sct" +--summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols +--info sizes --info totals --info unused --info veneers +--list "..\OBJ\USART.map" -o ..\OBJ\USART.axf \ No newline at end of file diff --git a/OBJ/USART.sct b/OBJ/USART.sct index a0a60b6..eab6f57 100644 --- a/OBJ/USART.sct +++ b/OBJ/USART.sct @@ -7,6 +7,7 @@ LR_IROM1 0x08000000 0x00080000 { ; load region size_region *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) + .ANY (+XO) } RW_IRAM1 0x20000000 0x00020000 { ; RW data .ANY (+RW +ZI) diff --git a/OBJ/USART_USART.dep b/OBJ/USART_USART.dep new file mode 100644 index 0000000..ea28d17 --- /dev/null +++ b/OBJ/USART_USART.dep @@ -0,0 +1,811 @@ +Dependencies for Project 'USART', Target 'USART': (DO NOT MODIFY !) +CompilerVersion: 5060422::V5.06 update 4 (build 422)::ARMCC +F (.\main.c)(0x698B66C0)(--c99 -c --cpu Cortex-M4.fp.sp -D__MICROLIB -g -W -O0 --apcs=interwork --split_sections -I ..\CORE -I ..\SYSTEM\delay -I ..\SYSTEM\sys -I ..\SYSTEM\usart -I ..\FWLIB\STM32F4xx_StdPeriph_Driver\inc -I ..\USER -I ..\HARDWARE\LED -I ..\HARDWARE\BEEP -I ..\HARDWARE\KEY -I ..\FWLIB\inc -I ..\HARDWARE -I ..\HARDWARE\MOTOR -IC:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.11.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION="538" -DSTM32F407xx -DSTM32F40_41xxx -DUSE_STDPERIPH_DRIVER -o ..\obj\main.o --omf_browse ..\obj\main.crf --depend ..\obj\main.d) +I (..\SYSTEM\sys\sys.h)(0x698B44C7) +I (..\USER\stm32f4xx.h)(0x698B44C7) +I (..\CORE\core_cm4.h)(0x698B44C7) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x57F606B8) +I (..\CORE\core_cmInstr.h)(0x698B44C7) +I (..\CORE\core_cmFunc.h)(0x698B44C7) +I (..\CORE\core_cm4_simd.h)(0x698B44C7) +I (..\USER\system_stm32f4xx.h)(0x698B44C7) +I (..\USER\stm32f4xx_conf.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_adc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_crc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dbgmcu.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dma.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_exti.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_flash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_gpio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_i2c.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_iwdg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_pwr.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rcc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rtc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_sdio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_spi.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_syscfg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_tim.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_usart.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_wwdg.h)(0x698B44C7) +I (..\FWLIB\inc\misc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_cryp.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_hash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rng.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_can.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dac.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dcmi.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_fsmc.h)(0x698B44C7) +I (..\SYSTEM\delay\delay.h)(0x698B44C7) +I (..\SYSTEM\usart\usart.h)(0x698B44C7) +I (C:\Keil_v5\ARM\ARMCC\include\stdio.h)(0x57F606B8) +I (..\HARDWARE\LED\led.h)(0x698B5D68) +I (..\HARDWARE\BEEP\beep.h)(0x698B44C7) +I (..\HARDWARE\KEY\key.h)(0x698B44C7) +I (..\HARDWARE\MOTOR\motor_driver.h)(0x698B5F12) +F (.\stm32f4xx_it.c)(0x698B44C7)(--c99 -c --cpu Cortex-M4.fp.sp -D__MICROLIB -g -W -O0 --apcs=interwork --split_sections -I ..\CORE -I ..\SYSTEM\delay -I ..\SYSTEM\sys -I ..\SYSTEM\usart -I ..\FWLIB\STM32F4xx_StdPeriph_Driver\inc -I ..\USER -I ..\HARDWARE\LED -I ..\HARDWARE\BEEP -I ..\HARDWARE\KEY -I ..\FWLIB\inc -I ..\HARDWARE -I ..\HARDWARE\MOTOR -IC:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.11.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION="538" -DSTM32F407xx -DSTM32F40_41xxx -DUSE_STDPERIPH_DRIVER -o ..\obj\stm32f4xx_it.o --omf_browse ..\obj\stm32f4xx_it.crf --depend ..\obj\stm32f4xx_it.d) +I (stm32f4xx_it.h)(0x698B44C7) +I (stm32f4xx.h)(0x698B44C7) +I (..\CORE\core_cm4.h)(0x698B44C7) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x57F606B8) +I (..\CORE\core_cmInstr.h)(0x698B44C7) +I (..\CORE\core_cmFunc.h)(0x698B44C7) +I (..\CORE\core_cm4_simd.h)(0x698B44C7) +I (system_stm32f4xx.h)(0x698B44C7) +I (stm32f4xx_conf.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_adc.h)(0x698B44C7) +I (..\USER\stm32f4xx.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_crc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dbgmcu.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dma.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_exti.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_flash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_gpio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_i2c.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_iwdg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_pwr.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rcc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rtc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_sdio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_spi.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_syscfg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_tim.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_usart.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_wwdg.h)(0x698B44C7) +I (..\FWLIB\inc\misc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_cryp.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_hash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rng.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_can.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dac.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dcmi.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_fsmc.h)(0x698B44C7) +F (.\system_stm32f4xx.c)(0x698B44C7)(--c99 -c --cpu Cortex-M4.fp.sp -D__MICROLIB -g -W -O0 --apcs=interwork --split_sections -I ..\CORE -I ..\SYSTEM\delay -I ..\SYSTEM\sys -I ..\SYSTEM\usart -I ..\FWLIB\STM32F4xx_StdPeriph_Driver\inc -I ..\USER -I ..\HARDWARE\LED -I ..\HARDWARE\BEEP -I ..\HARDWARE\KEY -I ..\FWLIB\inc -I ..\HARDWARE -I ..\HARDWARE\MOTOR -IC:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.11.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION="538" -DSTM32F407xx -DSTM32F40_41xxx -DUSE_STDPERIPH_DRIVER -o ..\obj\system_stm32f4xx.o --omf_browse ..\obj\system_stm32f4xx.crf --depend ..\obj\system_stm32f4xx.d) +I (stm32f4xx.h)(0x698B44C7) +I (..\CORE\core_cm4.h)(0x698B44C7) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x57F606B8) +I (..\CORE\core_cmInstr.h)(0x698B44C7) +I (..\CORE\core_cmFunc.h)(0x698B44C7) +I (..\CORE\core_cm4_simd.h)(0x698B44C7) +I (system_stm32f4xx.h)(0x698B44C7) +I (stm32f4xx_conf.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_adc.h)(0x698B44C7) +I (..\USER\stm32f4xx.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_crc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dbgmcu.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dma.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_exti.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_flash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_gpio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_i2c.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_iwdg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_pwr.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rcc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rtc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_sdio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_spi.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_syscfg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_tim.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_usart.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_wwdg.h)(0x698B44C7) +I (..\FWLIB\inc\misc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_cryp.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_hash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rng.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_can.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dac.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dcmi.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_fsmc.h)(0x698B44C7) +F (..\HARDWARE\LED\led.c)(0x698B5F8C)(--c99 -c --cpu Cortex-M4.fp.sp -D__MICROLIB -g -W -O0 --apcs=interwork --split_sections -I ..\CORE -I ..\SYSTEM\delay -I ..\SYSTEM\sys -I ..\SYSTEM\usart -I ..\FWLIB\STM32F4xx_StdPeriph_Driver\inc -I ..\USER -I ..\HARDWARE\LED -I ..\HARDWARE\BEEP -I ..\HARDWARE\KEY -I ..\FWLIB\inc -I ..\HARDWARE -I ..\HARDWARE\MOTOR -IC:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.11.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION="538" -DSTM32F407xx -DSTM32F40_41xxx -DUSE_STDPERIPH_DRIVER -o ..\obj\led.o --omf_browse ..\obj\led.crf --depend ..\obj\led.d) +I (..\HARDWARE\LED\led.h)(0x698B5D68) +I (..\SYSTEM\sys\sys.h)(0x698B44C7) +I (..\USER\stm32f4xx.h)(0x698B44C7) +I (..\CORE\core_cm4.h)(0x698B44C7) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x57F606B8) +I (..\CORE\core_cmInstr.h)(0x698B44C7) +I (..\CORE\core_cmFunc.h)(0x698B44C7) +I (..\CORE\core_cm4_simd.h)(0x698B44C7) +I (..\USER\system_stm32f4xx.h)(0x698B44C7) +I (..\USER\stm32f4xx_conf.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_adc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_crc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dbgmcu.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dma.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_exti.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_flash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_gpio.h)(0x698B44C7) +I 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(..\CORE\core_cm4_simd.h)(0x698B44C7) +I (..\USER\system_stm32f4xx.h)(0x698B44C7) +I (..\USER\stm32f4xx_conf.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_crc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dbgmcu.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dma.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_exti.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_flash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_gpio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_i2c.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_iwdg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_pwr.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rcc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rtc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_sdio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_spi.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_syscfg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_tim.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_usart.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_wwdg.h)(0x698B44C7) +I (..\FWLIB\inc\misc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_cryp.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_hash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rng.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_can.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dac.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dcmi.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_fsmc.h)(0x698B44C7) +F (..\FWLIB\src\stm32f4xx_tim.c)(0x698B44C7)(--c99 -c --cpu Cortex-M4.fp.sp -D__MICROLIB -g -W -O0 --apcs=interwork --split_sections -I ..\CORE -I ..\SYSTEM\delay -I ..\SYSTEM\sys -I ..\SYSTEM\usart -I ..\FWLIB\STM32F4xx_StdPeriph_Driver\inc -I ..\USER -I ..\HARDWARE\LED -I ..\HARDWARE\BEEP -I ..\HARDWARE\KEY -I ..\FWLIB\inc -I ..\HARDWARE -I ..\HARDWARE\MOTOR -IC:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.11.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION="538" -DSTM32F407xx -DSTM32F40_41xxx -DUSE_STDPERIPH_DRIVER -o ..\obj\stm32f4xx_tim.o --omf_browse ..\obj\stm32f4xx_tim.crf --depend ..\obj\stm32f4xx_tim.d) +I (..\FWLIB\inc\stm32f4xx_tim.h)(0x698B44C7) +I (..\USER\stm32f4xx.h)(0x698B44C7) +I (..\CORE\core_cm4.h)(0x698B44C7) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x57F606B8) +I (..\CORE\core_cmInstr.h)(0x698B44C7) +I (..\CORE\core_cmFunc.h)(0x698B44C7) +I (..\CORE\core_cm4_simd.h)(0x698B44C7) +I (..\USER\system_stm32f4xx.h)(0x698B44C7) +I (..\USER\stm32f4xx_conf.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_adc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_crc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dbgmcu.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dma.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_exti.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_flash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_gpio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_i2c.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_iwdg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_pwr.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rcc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rtc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_sdio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_spi.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_syscfg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_usart.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_wwdg.h)(0x698B44C7) +I (..\FWLIB\inc\misc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_cryp.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_hash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_rng.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_can.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dac.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dcmi.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_fsmc.h)(0x698B44C7) +F (..\FWLIB\src\stm32f4xx_spi.c)(0x698B44C7)(--c99 -c --cpu Cortex-M4.fp.sp -D__MICROLIB -g -W -O0 --apcs=interwork --split_sections -I ..\CORE -I ..\SYSTEM\delay -I ..\SYSTEM\sys -I ..\SYSTEM\usart -I ..\FWLIB\STM32F4xx_StdPeriph_Driver\inc -I ..\USER -I ..\HARDWARE\LED -I ..\HARDWARE\BEEP -I ..\HARDWARE\KEY -I ..\FWLIB\inc -I ..\HARDWARE -I ..\HARDWARE\MOTOR -IC:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.11.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION="538" -DSTM32F407xx -DSTM32F40_41xxx -DUSE_STDPERIPH_DRIVER -o ..\obj\stm32f4xx_spi.o --omf_browse ..\obj\stm32f4xx_spi.crf --depend ..\obj\stm32f4xx_spi.d) +I (..\FWLIB\inc\stm32f4xx_spi.h)(0x698B44C7) +I (..\USER\stm32f4xx.h)(0x698B44C7) +I (..\CORE\core_cm4.h)(0x698B44C7) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x57F606B8) +I (..\CORE\core_cmInstr.h)(0x698B44C7) +I (..\CORE\core_cmFunc.h)(0x698B44C7) +I (..\CORE\core_cm4_simd.h)(0x698B44C7) +I (..\USER\system_stm32f4xx.h)(0x698B44C7) +I (..\USER\stm32f4xx_conf.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_adc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_crc.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dbgmcu.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_dma.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_exti.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_flash.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_gpio.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_i2c.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_iwdg.h)(0x698B44C7) +I (..\FWLIB\inc\stm32f4xx_pwr.h)(0x698B44C7) +I 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    - 0 - 0 - 0 - 0 - 0 - 1 - .\main.c - - \\USART\main.c\227 +     @@ -241,7 +193,7 @@ 0 0 - 1 + 0 0 0 0 @@ -279,6 +231,7 @@ 1 + 0 0 2 10000000 @@ -420,17 +373,29 @@ 0 0 + + 2 + 11 + 1 + 0 + 0 + 0 + ..\HARDWARE\MOTOR\motor_driver.c + motor_driver.c + 0 + 0 + SYSTEM - 1 + 0 0 0 0 3 - 11 + 12 1 0 0 @@ -442,7 +407,7 @@ 3 - 12 + 13 1 0 0 @@ -454,9 +419,9 @@ 3 - 13 + 14 1 - 1 + 0 0 0 ..\SYSTEM\usart\usart.c @@ -468,13 +433,13 @@ CORE - 1 + 0 0 0 0 4 - 14 + 15 2 0 0 @@ -488,13 +453,13 @@ FWLIB - 1 + 0 0 0 0 5 - 15 + 16 1 0 0 @@ -506,7 +471,7 @@ 5 - 16 + 17 1 0 0 @@ -518,7 +483,7 @@ 5 - 17 + 18 1 0 0 @@ -530,7 +495,7 @@ 5 - 18 + 19 1 0 0 @@ -542,7 +507,7 @@ 5 - 19 + 20 1 0 0 @@ -554,7 +519,7 @@ 5 - 20 + 21 1 0 0 @@ -566,7 +531,7 @@ 5 - 21 + 22 1 0 0 @@ -578,7 +543,7 @@ 5 - 22 + 23 1 0 0 @@ -598,7 +563,7 @@ 0 6 - 23 + 24 5 0 0 diff --git a/USER/USART.uvprojx b/USER/USART.uvprojx index b82f107..4965b4b 100644 --- a/USER/USART.uvprojx +++ b/USER/USART.uvprojx @@ -10,14 +10,14 @@ USART 0x4 ARM-ADS - 5050169::V5.05 update 2 (build 169)::ARMCC + 5060422::V5.06 update 4 (build 422)::ARMCC 0 STM32F407VETx STMicroelectronics - Keil.STM32F4xx_DFP.2.14.0 - http://www.keil.com/pack/ + Keil.STM32F4xx_DFP.2.11.0 + http://www.keil.com/pack IRAM(0x20000000,0x00020000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00080000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE @@ -184,6 +184,9 @@ 0 0 2 + 0 + 0 + 0 1 0 8 @@ -337,7 +340,7 @@ STM32F40_41xxx,USE_STDPERIPH_DRIVER - ..\CORE;..\SYSTEM\delay;..\SYSTEM\sys;..\SYSTEM\usart;..\FWLIB\STM32F4xx_StdPeriph_Driver\inc;..\USER;..\HARDWARE\LED;..\HARDWARE\BEEP;..\HARDWARE\KEY;..\FWLIB\inc;..\HARDWARE + ..\CORE;..\SYSTEM\delay;..\SYSTEM\sys;..\SYSTEM\usart;..\FWLIB\STM32F4xx_StdPeriph_Driver\inc;..\USER;..\HARDWARE\LED;..\HARDWARE\BEEP;..\HARDWARE\KEY;..\FWLIB\inc;..\HARDWARE;..\HARDWARE\MOTOR @@ -350,7 +353,7 @@ 0 0 0 - 0 + 4 @@ -436,6 +439,11 @@ 1 ..\HARDWARE\SPI\spi.c + + motor_driver.c + 1 + ..\HARDWARE\MOTOR\motor_driver.c + diff --git a/USER/main.c b/USER/main.c index 4054dde..5c0f801 100644 --- a/USER/main.c +++ b/USER/main.c @@ -4,7 +4,7 @@ #include "led.h" #include "beep.h" #include "key.h" - +#include "motor_driver.h" //ALIENTEK 探索者STM32F407开发板 实验4 //串口通信实验 -库函数版本 @@ -168,6 +168,16 @@ extern uint8_t g_usart1_rx_buf[USART_REC_LEN]; extern uint16_t g_usart1_rx_sta; extern uint16_t g_usart1_rx_state; +extern uint8_t g_usart2_rx_buf[USART_REC_LEN]; +extern uint16_t g_usart2_rx_sta; +extern uint16_t g_usart2_rx_state; + + +extern uint8_t g_usart3_rx_buf[USART_REC_LEN]; +extern uint16_t g_usart3_rx_sta; +extern uint16_t g_usart3_rx_state; + + extern uint8_t g_rx1_buffer[RXBUFFERSIZE]; /* HAL库使用的串口接收缓冲 */ /* 接收缓冲, 最大USART_REC_LEN个字节. */ extern uint8_t g_usart2_rx_buf[USART_REC_LEN]; @@ -209,20 +219,76 @@ int main(void) motor_spi1_init(); motor_spi2_init(); TIM1_PWM_Init(16, 32); - TIM2_PWM_Init(16, 32); + //TIM2_PWM_Init(16, 32); TIM4_PWM_Init(16, 32); TIM_Cmd(TIM1, DISABLE); - TIM_Cmd(TIM2, DISABLE); + //TIM_Cmd(TIM2, DISABLE); TIM_Cmd(TIM4, DISABLE); + //--------------------------------------------- + // 初始化DRV8832电机驱动 + DRV8832_Init(); + + // 初始化PWM定时器（如果需要调速） + PWM_Timer_Init(); + + // 使能全局中断 + __enable_irq(); + //======================================================================= + while(1) { + // 示例1：基本控制（全速正反转） + Motor_Control(MOTOR_FORWARD); // 正转 + delay_ms(5000); + Motor_SafeDirectionChange(MOTOR_REVERSE); // 安全切换到反转 + delay_ms(5000); + + Motor_Control(MOTOR_BRAKE); // 刹车 + delay_ms(500); + + Motor_Control(MOTOR_STOP); // 停止（滑行） + delay_ms(1000); + + // 示例2：PWM调速演示 + // 正转加速 +// for(uint8_t speed = 0; speed <= 100; speed += 10) { +// Motor_SetSpeed(speed, MOTOR_FORWARD); +// delay_ms(200); +// } +// delay_ms(2000); +// +// // 正转减速 +// for(uint8_t speed = 100; speed > 0; speed -= 10) { +// Motor_SetSpeed(speed, MOTOR_FORWARD); +// delay_ms(200); +// } +// Motor_SetSpeed(0, MOTOR_STOP); +// delay_ms(1000); + + // 检查故障状态 + if(Motor_GetFaultStatus()) { + // 发生故障，停止电机 + Motor_Control(MOTOR_STOP); + + // 可以添加故障处理代码，如闪烁LED或串口输出 + // ... + + // 等待故障清除 + while(Motor_GetFaultStatus()) { + delay_ms(100); + } + } + } + + + //======================================================================= while(1) { - printf("I love you lao zhang\n"); + printf("I love you lao zhang\n"); - delay_ms(300); + delay_ms(300); printf("I love you zhengshuo\n"); - delay_ms(300); + delay_ms(300); Uart4_Send_data(frame_updata,6); //------------------------------------------------- @@ -238,6 +304,31 @@ int main(void) g_rx1_buffer[0] = 0x0; Uart6_Send_data(frame_updata,6); } + if(g_usart2_rx_state == 1) + { + // g_usart1_rx_buf[1] = 0x01; + // g_usart1_rx_buf[3] = 0x34; + // g_usart1_rx_buf[4] = crc8_standard(g_usart1_rx_buf,4); + + g_usart2_rx_state = 0; + memcpy(frame_updata,g_usart2_rx_buf,6 ); + memset(g_usart2_rx_buf, 0x0, 6); + g_rx2_buffer[0] = 0x0; + Uart6_Send_data(frame_updata,6); + } + if(g_usart3_rx_state == 1) + { + // g_usart1_rx_buf[1] = 0x01; + // g_usart1_rx_buf[3] = 0x34; + // g_usart1_rx_buf[4] = crc8_standard(g_usart1_rx_buf,4); + + g_usart3_rx_state = 0; + memcpy(frame_updata,g_usart3_rx_buf,6 ); + memset(g_usart3_rx_buf, 0x0, 6); + g_rx3_buffer[0] = 0x0; + Uart6_Send_data(frame_updata,6); + } + //------------------------------------------------- // if(USART_RX_STA&0x8000)

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zChM}uOg3QRM40acQa3rCi47stFu&&mJ<=O-FU`fq!(vwl91DpT$rZNMQIGS?L zyyB7~WGxC4e@k=0tynf$fl(I0eK*;iQ31hSJh_lj4#8bEnUO`tI58y|*}Om^`~lJ@ zkX(eK&vCLYi_ByLCQgL;j39NBDB zvZ51UTQiMNY^??Y3<6R;^InYqZ0)d%`WMyRwnv8V)D*bQX3NqKonI(u0BkW@dZIhn0JnT-*MnShuXh*^M`b$c=!+ml5A2@d%< diff --git a/OBJ/startup_stm32f40_41xxx.lst b/OBJ/startup_stm32f40_41xxx.lst new file mode 100644 index 0000000..0393267 --- /dev/null +++ b/OBJ/startup_stm32f40_41xxx.lst @@ -0,0 +1,1957 @@ + + + +ARM Macro Assembler Page 1 + + + 1 00000000 ;******************** (C) COPYRIGHT 2014 STMicroelectron + ics ******************** + 2 00000000 ;* File Name : startup_stm32f40_41xxx.s + 3 00000000 ;* Author : MCD Application Team + 4 00000000 ;* @version : V1.4.0 + 5 00000000 ;* @date : 04-August-2014 + 6 00000000 ;* Description : STM32F40xxx/41xxx devices vector + table for MDK-ARM toolchain. + 7 00000000 ;* This module performs: + 8 00000000 ;* - Set the initial SP + 9 00000000 ;* - Set the initial PC == Reset_Ha + ndler + 10 00000000 ;* - Set the vector table entries w + ith the exceptions ISR address + 11 00000000 ;* - Configure the system clock and + the external SRAM mounted on + 12 00000000 ;* STM324xG-EVAL board to be used + as data memory (optional, + 13 00000000 ;* to be enabled by user) + 14 00000000 ;* - Branches to __main in the C li + brary (which eventually + 15 00000000 ;* calls main()). + 16 00000000 ;* After Reset the CortexM4 process + or is in Thread mode, + 17 00000000 ;* priority is Privileged, and the + Stack is set to Main. + 18 00000000 ;* <<< Use Configuration Wizard in Context Menu >>> + 19 00000000 ;******************************************************* + ************************ + 20 00000000 ; + 21 00000000 ; Licensed under MCD-ST Liberty SW License Agreement V2, + (the "License"); + 22 00000000 ; You may not use this file except in compliance with th + e License. + 23 00000000 ; You may obtain a copy of the License at: + 24 00000000 ; + 25 00000000 ; http://www.st.com/software_license_agreement_li + berty_v2 + 26 00000000 ; + 27 00000000 ; Unless required by applicable law or agreed to in writ + ing, software + 28 00000000 ; distributed under the License is distributed on an "AS + IS" BASIS, + 29 00000000 ; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either e + xpress or implied. + 30 00000000 ; See the License for the specific language governing pe + rmissions and + 31 00000000 ; limitations under the License. + 32 00000000 ; + 33 00000000 ;******************************************************* + ************************ + 34 00000000 + 35 00000000 ; Amount of memory (in bytes) allocated for Stack + 36 00000000 ; Tailor this value to your application needs + 37 00000000 ; Stack Configuration + 38 00000000 ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> + 39 00000000 ; + 40 00000000 + 41 00000000 00000400 + + + +ARM Macro Assembler Page 2 + + + Stack_Size + EQU 0x00000400 + 42 00000000 + 43 00000000 AREA STACK, NOINIT, READWRITE, ALIGN +=3 + 44 00000000 Stack_Mem + SPACE Stack_Size + 45 00000400 __initial_sp + 46 00000400 + 47 00000400 + 48 00000400 ; Heap Configuration + 49 00000400 ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> + 50 00000400 ; + 51 00000400 + 52 00000400 00000200 + Heap_Size + EQU 0x00000200 + 53 00000400 + 54 00000400 AREA HEAP, NOINIT, READWRITE, ALIGN= +3 + 55 00000000 __heap_base + 56 00000000 Heap_Mem + SPACE Heap_Size + 57 00000200 __heap_limit + 58 00000200 + 59 00000200 PRESERVE8 + 60 00000200 THUMB + 61 00000200 + 62 00000200 + 63 00000200 ; Vector Table Mapped to Address 0 at Reset + 64 00000200 AREA RESET, DATA, READONLY + 65 00000000 EXPORT __Vectors + 66 00000000 EXPORT __Vectors_End + 67 00000000 EXPORT __Vectors_Size + 68 00000000 + 69 00000000 00000000 + __Vectors + DCD __initial_sp ; Top of Stack + 70 00000004 00000000 DCD Reset_Handler ; Reset Handler + 71 00000008 00000000 DCD NMI_Handler ; NMI Handler + 72 0000000C 00000000 DCD HardFault_Handler ; Hard Fault + Handler + 73 00000010 00000000 DCD MemManage_Handler + ; MPU Fault Handler + + 74 00000014 00000000 DCD BusFault_Handler + ; Bus Fault Handler + + 75 00000018 00000000 DCD UsageFault_Handler ; Usage Faul + t Handler + 76 0000001C 00000000 DCD 0 ; Reserved + 77 00000020 00000000 DCD 0 ; Reserved + 78 00000024 00000000 DCD 0 ; Reserved + 79 00000028 00000000 DCD 0 ; Reserved + 80 0000002C 00000000 DCD SVC_Handler ; SVCall Handler + 81 00000030 00000000 DCD DebugMon_Handler ; Debug Monito + r Handler + 82 00000034 00000000 DCD 0 ; Reserved + 83 00000038 00000000 DCD PendSV_Handler ; PendSV Handler + + + +ARM Macro Assembler Page 3 + + + + 84 0000003C 00000000 DCD SysTick_Handler + ; SysTick Handler + 85 00000040 + 86 00000040 ; External Interrupts + 87 00000040 00000000 DCD WWDG_IRQHandler ; Window WatchD + og + + + 88 00000044 00000000 DCD PVD_IRQHandler ; PVD through EX + TI Line detection + + + 89 00000048 00000000 DCD TAMP_STAMP_IRQHandler ; Tamper + and TimeStamps thro + ugh the EXTI line + + 90 0000004C 00000000 DCD RTC_WKUP_IRQHandler ; RTC Wakeu + p through the EXTI + line + + 91 00000050 00000000 DCD FLASH_IRQHandler ; FLASH + + + 92 00000054 00000000 DCD RCC_IRQHandler ; RCC + + + 93 00000058 00000000 DCD EXTI0_IRQHandler ; EXTI Line0 + + + + 94 0000005C 00000000 DCD EXTI1_IRQHandler ; EXTI Line1 + + + + 95 00000060 00000000 DCD EXTI2_IRQHandler ; EXTI Line2 + + + + 96 00000064 00000000 DCD EXTI3_IRQHandler ; EXTI Line3 + + + + 97 00000068 00000000 DCD EXTI4_IRQHandler ; EXTI Line4 + + + + 98 0000006C 00000000 DCD DMA1_Stream0_IRQHandler ; DMA1 + Stream 0 + + + 99 00000070 00000000 DCD DMA1_Stream1_IRQHandler ; DMA1 + Stream 1 + + + 100 00000074 00000000 DCD DMA1_Stream2_IRQHandler ; DMA1 + Stream 2 + + + + + +ARM Macro Assembler Page 4 + + + 101 00000078 00000000 DCD DMA1_Stream3_IRQHandler ; DMA1 + Stream 3 + + + 102 0000007C 00000000 DCD DMA1_Stream4_IRQHandler ; DMA1 + Stream 4 + + + 103 00000080 00000000 DCD DMA1_Stream5_IRQHandler ; DMA1 + Stream 5 + + + 104 00000084 00000000 DCD DMA1_Stream6_IRQHandler ; DMA1 + Stream 6 + + + 105 00000088 00000000 DCD ADC_IRQHandler ; ADC1, ADC2 and + ADC3s + + 106 0000008C 00000000 DCD CAN1_TX_IRQHandler ; CAN1 TX + + + + 107 00000090 00000000 DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + + + + 108 00000094 00000000 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + + + + 109 00000098 00000000 DCD CAN1_SCE_IRQHandler ; CAN1 SCE + + + + 110 0000009C 00000000 DCD EXTI9_5_IRQHandler ; External L + ine[9:5]s + + + 111 000000A0 00000000 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 + Break and TIM9 + + 112 000000A4 00000000 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 + Update and TIM10 + + 113 000000A8 00000000 DCD TIM1_TRG_COM_TIM11_IRQHandler ; + TIM1 Trigger and C + ommutation and TIM1 + 1 + 114 000000AC 00000000 DCD TIM1_CC_IRQHandler ; TIM1 Captu + re Compare + + + 115 000000B0 00000000 DCD TIM2_IRQHandler ; TIM2 + + + 116 000000B4 00000000 DCD TIM3_IRQHandler ; TIM3 + + + + + +ARM Macro Assembler Page 5 + + + 117 000000B8 00000000 DCD TIM4_IRQHandler ; TIM4 + + + 118 000000BC 00000000 DCD I2C1_EV_IRQHandler ; I2C1 Event + + + + 119 000000C0 00000000 DCD I2C1_ER_IRQHandler ; I2C1 Error + + + + 120 000000C4 00000000 DCD I2C2_EV_IRQHandler ; I2C2 Event + + + + 121 000000C8 00000000 DCD I2C2_ER_IRQHandler ; I2C2 Error + + + + 122 000000CC 00000000 DCD SPI1_IRQHandler ; SPI1 + + + 123 000000D0 00000000 DCD SPI2_IRQHandler ; SPI2 + + + 124 000000D4 00000000 DCD USART1_IRQHandler ; USART1 + + + 125 000000D8 00000000 DCD USART2_IRQHandler ; USART2 + + + 126 000000DC 00000000 DCD USART3_IRQHandler ; USART3 + + + 127 000000E0 00000000 DCD EXTI15_10_IRQHandler ; External + Line[15:10]s + + + 128 000000E4 00000000 DCD RTC_Alarm_IRQHandler ; RTC Alar + m (A and B) through + EXTI Line + + 129 000000E8 00000000 DCD OTG_FS_WKUP_IRQHandler ; USB OT + G FS Wakeup through + EXTI line + + 130 000000EC 00000000 DCD TIM8_BRK_TIM12_IRQHandler ; TIM + 8 Break and TIM12 + + 131 000000F0 00000000 DCD TIM8_UP_TIM13_IRQHandler ; TIM8 + Update and TIM13 + + 132 000000F4 00000000 DCD TIM8_TRG_COM_TIM14_IRQHandler ; + TIM8 Trigger and C + ommutation and TIM1 + 4 + 133 000000F8 00000000 DCD TIM8_CC_IRQHandler ; TIM8 Captu + re Compare + + + + +ARM Macro Assembler Page 6 + + + + 134 000000FC 00000000 DCD DMA1_Stream7_IRQHandler ; DMA1 + Stream7 + + + 135 00000100 00000000 DCD FSMC_IRQHandler ; FSMC + + + 136 00000104 00000000 DCD SDIO_IRQHandler ; SDIO + + + 137 00000108 00000000 DCD TIM5_IRQHandler ; TIM5 + + + 138 0000010C 00000000 DCD SPI3_IRQHandler ; SPI3 + + + 139 00000110 00000000 DCD UART4_IRQHandler ; UART4 + + + 140 00000114 00000000 DCD UART5_IRQHandler ; UART5 + + + 141 00000118 00000000 DCD TIM6_DAC_IRQHandler ; TIM6 and + DAC1&2 underrun err + ors + + 142 0000011C 00000000 DCD TIM7_IRQHandler ; TIM7 + + 143 00000120 00000000 DCD DMA2_Stream0_IRQHandler ; DMA2 + Stream 0 + + + 144 00000124 00000000 DCD DMA2_Stream1_IRQHandler ; DMA2 + Stream 1 + + + 145 00000128 00000000 DCD DMA2_Stream2_IRQHandler ; DMA2 + Stream 2 + + + 146 0000012C 00000000 DCD DMA2_Stream3_IRQHandler ; DMA2 + Stream 3 + + + 147 00000130 00000000 DCD DMA2_Stream4_IRQHandler ; DMA2 + Stream 4 + + + 148 00000134 00000000 DCD ETH_IRQHandler ; Ethernet + + + 149 00000138 00000000 DCD ETH_WKUP_IRQHandler ; Ethernet + Wakeup through EXTI + line + + 150 0000013C 00000000 DCD CAN2_TX_IRQHandler ; CAN2 TX + + + + + +ARM Macro Assembler Page 7 + + + + 151 00000140 00000000 DCD CAN2_RX0_IRQHandler ; CAN2 RX0 + + + + 152 00000144 00000000 DCD CAN2_RX1_IRQHandler ; CAN2 RX1 + + + + 153 00000148 00000000 DCD CAN2_SCE_IRQHandler ; CAN2 SCE + + + + 154 0000014C 00000000 DCD OTG_FS_IRQHandler ; USB OTG FS + + + 155 00000150 00000000 DCD DMA2_Stream5_IRQHandler ; DMA2 + Stream 5 + + + 156 00000154 00000000 DCD DMA2_Stream6_IRQHandler ; DMA2 + Stream 6 + + + 157 00000158 00000000 DCD DMA2_Stream7_IRQHandler ; DMA2 + Stream 7 + + + 158 0000015C 00000000 DCD USART6_IRQHandler ; USART6 + + + + 159 00000160 00000000 DCD I2C3_EV_IRQHandler ; I2C3 event + + + + 160 00000164 00000000 DCD I2C3_ER_IRQHandler ; I2C3 error + + + + 161 00000168 00000000 DCD OTG_HS_EP1_OUT_IRQHandler ; USB + OTG HS End Point 1 + Out + + 162 0000016C 00000000 DCD OTG_HS_EP1_IN_IRQHandler ; USB + OTG HS End Point 1 + In + + 163 00000170 00000000 DCD OTG_HS_WKUP_IRQHandler ; USB OT + G HS Wakeup through + EXTI + + 164 00000174 00000000 DCD OTG_HS_IRQHandler ; USB OTG HS + + + 165 00000178 00000000 DCD DCMI_IRQHandler ; DCMI + + + 166 0000017C 00000000 DCD CRYP_IRQHandler ; CRYP crypto + + + +ARM Macro Assembler Page 8 + + + + + 167 00000180 00000000 DCD HASH_RNG_IRQHandler + ; Hash and Rng + 168 00000184 00000000 DCD FPU_IRQHandler ; FPU + 169 00000188 + 170 00000188 __Vectors_End + 171 00000188 + 172 00000188 00000188 + __Vectors_Size + EQU __Vectors_End - __Vectors + 173 00000188 + 174 00000188 AREA |.text|, CODE, READONLY + 175 00000000 + 176 00000000 ; Reset handler + 177 00000000 Reset_Handler + PROC + 178 00000000 EXPORT Reset_Handler [WEAK +] + 179 00000000 IMPORT SystemInit + 180 00000000 IMPORT __main + 181 00000000 + 182 00000000 4806 LDR R0, =SystemInit + 183 00000002 4780 BLX R0 + 184 00000004 4806 LDR R0, =__main + 185 00000006 4700 BX R0 + 186 00000008 ENDP + 187 00000008 + 188 00000008 ; Dummy Exception Handlers (infinite loops which can be + modified) + 189 00000008 + 190 00000008 NMI_Handler + PROC + 191 00000008 EXPORT NMI_Handler [WEA +K] + 192 00000008 E7FE B . + 193 0000000A ENDP + 195 0000000A HardFault_Handler + PROC + 196 0000000A EXPORT HardFault_Handler [WEA +K] + 197 0000000A E7FE B . + 198 0000000C ENDP + 200 0000000C MemManage_Handler + PROC + 201 0000000C EXPORT MemManage_Handler [WEA +K] + 202 0000000C E7FE B . + 203 0000000E ENDP + 205 0000000E BusFault_Handler + PROC + 206 0000000E EXPORT BusFault_Handler [WEA +K] + 207 0000000E E7FE B . + 208 00000010 ENDP + 210 00000010 UsageFault_Handler + PROC + 211 00000010 EXPORT UsageFault_Handler [WEA +K] + + + +ARM Macro Assembler Page 9 + + + 212 00000010 E7FE B . + 213 00000012 ENDP + 214 00000012 SVC_Handler + PROC + 215 00000012 EXPORT SVC_Handler [WEA +K] + 216 00000012 E7FE B . + 217 00000014 ENDP + 219 00000014 DebugMon_Handler + PROC + 220 00000014 EXPORT DebugMon_Handler [WEA +K] + 221 00000014 E7FE B . + 222 00000016 ENDP + 223 00000016 PendSV_Handler + PROC + 224 00000016 EXPORT PendSV_Handler [WEA +K] + 225 00000016 E7FE B . + 226 00000018 ENDP + 227 00000018 SysTick_Handler + PROC + 228 00000018 EXPORT SysTick_Handler [WEA +K] + 229 00000018 E7FE B . + 230 0000001A ENDP + 231 0000001A + 232 0000001A Default_Handler + PROC + 233 0000001A + 234 0000001A EXPORT WWDG_IRQHandler + [WEAK] + 235 0000001A EXPORT PVD_IRQHandler + [WEAK] + 236 0000001A EXPORT TAMP_STAMP_IRQHandler + [WEAK] + 237 0000001A EXPORT RTC_WKUP_IRQHandler + [WEAK] + 238 0000001A EXPORT FLASH_IRQHandler + [WEAK] + 239 0000001A EXPORT RCC_IRQHandler + [WEAK] + 240 0000001A EXPORT EXTI0_IRQHandler + [WEAK] + 241 0000001A EXPORT EXTI1_IRQHandler + [WEAK] + 242 0000001A EXPORT EXTI2_IRQHandler + [WEAK] + 243 0000001A EXPORT EXTI3_IRQHandler + [WEAK] + 244 0000001A EXPORT EXTI4_IRQHandler + [WEAK] + 245 0000001A EXPORT DMA1_Stream0_IRQHandler + [WEAK] + 246 0000001A EXPORT DMA1_Stream1_IRQHandler + [WEAK] + 247 0000001A EXPORT DMA1_Stream2_IRQHandler + [WEAK] + 248 0000001A EXPORT DMA1_Stream3_IRQHandler + + + +ARM Macro Assembler Page 10 + + + [WEAK] + 249 0000001A EXPORT DMA1_Stream4_IRQHandler + [WEAK] + 250 0000001A EXPORT DMA1_Stream5_IRQHandler + [WEAK] + 251 0000001A EXPORT DMA1_Stream6_IRQHandler + [WEAK] + 252 0000001A EXPORT ADC_IRQHandler + [WEAK] + 253 0000001A EXPORT CAN1_TX_IRQHandler + [WEAK] + 254 0000001A EXPORT CAN1_RX0_IRQHandler + [WEAK] + 255 0000001A EXPORT CAN1_RX1_IRQHandler + [WEAK] + 256 0000001A EXPORT CAN1_SCE_IRQHandler + [WEAK] + 257 0000001A EXPORT EXTI9_5_IRQHandler + [WEAK] + 258 0000001A EXPORT TIM1_BRK_TIM9_IRQHandler + [WEAK] + 259 0000001A EXPORT TIM1_UP_TIM10_IRQHandler + [WEAK] + 260 0000001A EXPORT TIM1_TRG_COM_TIM11_IRQHandler + [WEAK] + 261 0000001A EXPORT TIM1_CC_IRQHandler + [WEAK] + 262 0000001A EXPORT TIM2_IRQHandler + [WEAK] + 263 0000001A EXPORT TIM3_IRQHandler + [WEAK] + 264 0000001A EXPORT TIM4_IRQHandler + [WEAK] + 265 0000001A EXPORT I2C1_EV_IRQHandler + [WEAK] + 266 0000001A EXPORT I2C1_ER_IRQHandler + [WEAK] + 267 0000001A EXPORT I2C2_EV_IRQHandler + [WEAK] + 268 0000001A EXPORT I2C2_ER_IRQHandler + [WEAK] + 269 0000001A EXPORT SPI1_IRQHandler + [WEAK] + 270 0000001A EXPORT SPI2_IRQHandler + [WEAK] + 271 0000001A EXPORT USART1_IRQHandler + [WEAK] + 272 0000001A EXPORT USART2_IRQHandler + [WEAK] + 273 0000001A EXPORT USART3_IRQHandler + [WEAK] + 274 0000001A EXPORT EXTI15_10_IRQHandler + [WEAK] + 275 0000001A EXPORT RTC_Alarm_IRQHandler + [WEAK] + 276 0000001A EXPORT OTG_FS_WKUP_IRQHandler + [WEAK] + 277 0000001A EXPORT TIM8_BRK_TIM12_IRQHandler + [WEAK] + + + +ARM Macro Assembler Page 11 + + + 278 0000001A EXPORT TIM8_UP_TIM13_IRQHandler + [WEAK] + 279 0000001A EXPORT TIM8_TRG_COM_TIM14_IRQHandler + [WEAK] + 280 0000001A EXPORT TIM8_CC_IRQHandler + [WEAK] + 281 0000001A EXPORT DMA1_Stream7_IRQHandler + [WEAK] + 282 0000001A EXPORT FSMC_IRQHandler + [WEAK] + 283 0000001A EXPORT SDIO_IRQHandler + [WEAK] + 284 0000001A EXPORT TIM5_IRQHandler + [WEAK] + 285 0000001A EXPORT SPI3_IRQHandler + [WEAK] + 286 0000001A EXPORT UART4_IRQHandler + [WEAK] + 287 0000001A EXPORT UART5_IRQHandler + [WEAK] + 288 0000001A EXPORT TIM6_DAC_IRQHandler + [WEAK] + 289 0000001A EXPORT TIM7_IRQHandler + [WEAK] + 290 0000001A EXPORT DMA2_Stream0_IRQHandler + [WEAK] + 291 0000001A EXPORT DMA2_Stream1_IRQHandler + [WEAK] + 292 0000001A EXPORT DMA2_Stream2_IRQHandler + [WEAK] + 293 0000001A EXPORT DMA2_Stream3_IRQHandler + [WEAK] + 294 0000001A EXPORT DMA2_Stream4_IRQHandler + [WEAK] + 295 0000001A EXPORT ETH_IRQHandler + [WEAK] + 296 0000001A EXPORT ETH_WKUP_IRQHandler + [WEAK] + 297 0000001A EXPORT CAN2_TX_IRQHandler + [WEAK] + 298 0000001A EXPORT CAN2_RX0_IRQHandler + [WEAK] + 299 0000001A EXPORT CAN2_RX1_IRQHandler + [WEAK] + 300 0000001A EXPORT CAN2_SCE_IRQHandler + [WEAK] + 301 0000001A EXPORT OTG_FS_IRQHandler + [WEAK] + 302 0000001A EXPORT DMA2_Stream5_IRQHandler + [WEAK] + 303 0000001A EXPORT DMA2_Stream6_IRQHandler + [WEAK] + 304 0000001A EXPORT DMA2_Stream7_IRQHandler + [WEAK] + 305 0000001A EXPORT USART6_IRQHandler + [WEAK] + 306 0000001A EXPORT I2C3_EV_IRQHandler + [WEAK] + 307 0000001A EXPORT I2C3_ER_IRQHandler + + + +ARM Macro Assembler Page 12 + + + [WEAK] + 308 0000001A EXPORT OTG_HS_EP1_OUT_IRQHandler + [WEAK] + 309 0000001A EXPORT OTG_HS_EP1_IN_IRQHandler + [WEAK] + 310 0000001A EXPORT OTG_HS_WKUP_IRQHandler + [WEAK] + 311 0000001A EXPORT OTG_HS_IRQHandler + [WEAK] + 312 0000001A EXPORT DCMI_IRQHandler + [WEAK] + 313 0000001A EXPORT CRYP_IRQHandler + [WEAK] + 314 0000001A EXPORT HASH_RNG_IRQHandler + [WEAK] + 315 0000001A EXPORT FPU_IRQHandler + [WEAK] + 316 0000001A + 317 0000001A WWDG_IRQHandler + 318 0000001A PVD_IRQHandler + 319 0000001A TAMP_STAMP_IRQHandler + 320 0000001A RTC_WKUP_IRQHandler + 321 0000001A FLASH_IRQHandler + 322 0000001A RCC_IRQHandler + 323 0000001A EXTI0_IRQHandler + 324 0000001A EXTI1_IRQHandler + 325 0000001A EXTI2_IRQHandler + 326 0000001A EXTI3_IRQHandler + 327 0000001A EXTI4_IRQHandler + 328 0000001A DMA1_Stream0_IRQHandler + 329 0000001A DMA1_Stream1_IRQHandler + 330 0000001A DMA1_Stream2_IRQHandler + 331 0000001A DMA1_Stream3_IRQHandler + 332 0000001A DMA1_Stream4_IRQHandler + 333 0000001A DMA1_Stream5_IRQHandler + 334 0000001A DMA1_Stream6_IRQHandler + 335 0000001A ADC_IRQHandler + 336 0000001A CAN1_TX_IRQHandler + 337 0000001A CAN1_RX0_IRQHandler + 338 0000001A CAN1_RX1_IRQHandler + 339 0000001A CAN1_SCE_IRQHandler + 340 0000001A EXTI9_5_IRQHandler + 341 0000001A TIM1_BRK_TIM9_IRQHandler + 342 0000001A TIM1_UP_TIM10_IRQHandler + 343 0000001A TIM1_TRG_COM_TIM11_IRQHandler + 344 0000001A TIM1_CC_IRQHandler + 345 0000001A TIM2_IRQHandler + 346 0000001A TIM3_IRQHandler + 347 0000001A TIM4_IRQHandler + 348 0000001A I2C1_EV_IRQHandler + 349 0000001A I2C1_ER_IRQHandler + 350 0000001A I2C2_EV_IRQHandler + 351 0000001A I2C2_ER_IRQHandler + 352 0000001A SPI1_IRQHandler + 353 0000001A SPI2_IRQHandler + 354 0000001A USART1_IRQHandler + 355 0000001A USART2_IRQHandler + 356 0000001A USART3_IRQHandler + 357 0000001A EXTI15_10_IRQHandler + + + +ARM Macro Assembler Page 13 + + + 358 0000001A RTC_Alarm_IRQHandler + 359 0000001A OTG_FS_WKUP_IRQHandler + 360 0000001A TIM8_BRK_TIM12_IRQHandler + 361 0000001A TIM8_UP_TIM13_IRQHandler + 362 0000001A TIM8_TRG_COM_TIM14_IRQHandler + 363 0000001A TIM8_CC_IRQHandler + 364 0000001A DMA1_Stream7_IRQHandler + 365 0000001A FSMC_IRQHandler + 366 0000001A SDIO_IRQHandler + 367 0000001A TIM5_IRQHandler + 368 0000001A SPI3_IRQHandler + 369 0000001A UART4_IRQHandler + 370 0000001A UART5_IRQHandler + 371 0000001A TIM6_DAC_IRQHandler + 372 0000001A TIM7_IRQHandler + 373 0000001A DMA2_Stream0_IRQHandler + 374 0000001A DMA2_Stream1_IRQHandler + 375 0000001A DMA2_Stream2_IRQHandler + 376 0000001A DMA2_Stream3_IRQHandler + 377 0000001A DMA2_Stream4_IRQHandler + 378 0000001A ETH_IRQHandler + 379 0000001A ETH_WKUP_IRQHandler + 380 0000001A CAN2_TX_IRQHandler + 381 0000001A CAN2_RX0_IRQHandler + 382 0000001A CAN2_RX1_IRQHandler + 383 0000001A CAN2_SCE_IRQHandler + 384 0000001A OTG_FS_IRQHandler + 385 0000001A DMA2_Stream5_IRQHandler + 386 0000001A DMA2_Stream6_IRQHandler + 387 0000001A DMA2_Stream7_IRQHandler + 388 0000001A USART6_IRQHandler + 389 0000001A I2C3_EV_IRQHandler + 390 0000001A I2C3_ER_IRQHandler + 391 0000001A OTG_HS_EP1_OUT_IRQHandler + 392 0000001A OTG_HS_EP1_IN_IRQHandler + 393 0000001A OTG_HS_WKUP_IRQHandler + 394 0000001A OTG_HS_IRQHandler + 395 0000001A DCMI_IRQHandler + 396 0000001A CRYP_IRQHandler + 397 0000001A HASH_RNG_IRQHandler + 398 0000001A FPU_IRQHandler + 399 0000001A + 400 0000001A E7FE B . + 401 0000001C + 402 0000001C ENDP + 403 0000001C + 404 0000001C ALIGN + 405 0000001C + 406 0000001C ;******************************************************* + ************************ + 407 0000001C ; User Stack and Heap initialization + 408 0000001C ;******************************************************* + ************************ + 409 0000001C IF :DEF:__MICROLIB + 410 0000001C + 411 0000001C EXPORT __initial_sp + 412 0000001C EXPORT __heap_base + 413 0000001C EXPORT __heap_limit + 414 0000001C + + + +ARM Macro Assembler Page 14 + + + 415 0000001C ELSE + 430 ENDIF + 431 0000001C + 432 0000001C END + 00000000 + 00000000 +Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M4.fp.sp --apcs= +interwork --depend=..\obj\startup_stm32f40_41xxx.d -o..\obj\startup_stm32f40_41 +xxx.o -IC:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.11.0\Drivers\CMSIS\Device\ST\S +TM32F4xx\Include --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION + SETA 538" --predefine="STM32F407xx SETA 1" --list=..\obj\startup_stm32f40_41xx +x.lst ..\CORE\startup_stm32f40_41xxx.s + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +STACK 00000000 + +Symbol: STACK + Definitions + At line 43 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + None +Comment: STACK unused +Stack_Mem 00000000 + +Symbol: Stack_Mem + Definitions + At line 44 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + None +Comment: Stack_Mem unused +__initial_sp 00000400 + +Symbol: __initial_sp + Definitions + At line 45 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 69 in file ..\CORE\startup_stm32f40_41xxx.s + At line 411 in file ..\CORE\startup_stm32f40_41xxx.s + +3 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +HEAP 00000000 + +Symbol: HEAP + Definitions + At line 54 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + None +Comment: HEAP unused +Heap_Mem 00000000 + +Symbol: Heap_Mem + Definitions + At line 56 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + None +Comment: Heap_Mem unused +__heap_base 00000000 + +Symbol: __heap_base + Definitions + At line 55 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 412 in file ..\CORE\startup_stm32f40_41xxx.s +Comment: __heap_base used once +__heap_limit 00000200 + +Symbol: __heap_limit + Definitions + At line 57 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 413 in file ..\CORE\startup_stm32f40_41xxx.s +Comment: __heap_limit used once +4 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +RESET 00000000 + +Symbol: RESET + Definitions + At line 64 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + None +Comment: RESET unused +__Vectors 00000000 + +Symbol: __Vectors + Definitions + At line 69 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 65 in file ..\CORE\startup_stm32f40_41xxx.s + At line 172 in file ..\CORE\startup_stm32f40_41xxx.s + +__Vectors_End 00000188 + +Symbol: __Vectors_End + Definitions + At line 170 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 66 in file ..\CORE\startup_stm32f40_41xxx.s + At line 172 in file ..\CORE\startup_stm32f40_41xxx.s + +3 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +.text 00000000 + +Symbol: .text + Definitions + At line 174 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + None +Comment: .text unused +ADC_IRQHandler 0000001A + +Symbol: ADC_IRQHandler + Definitions + At line 335 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 105 in file ..\CORE\startup_stm32f40_41xxx.s + At line 252 in file ..\CORE\startup_stm32f40_41xxx.s + +BusFault_Handler 0000000E + +Symbol: BusFault_Handler + Definitions + At line 205 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 74 in file ..\CORE\startup_stm32f40_41xxx.s + At line 206 in file ..\CORE\startup_stm32f40_41xxx.s + +CAN1_RX0_IRQHandler 0000001A + +Symbol: CAN1_RX0_IRQHandler + Definitions + At line 337 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 107 in file ..\CORE\startup_stm32f40_41xxx.s + At line 254 in file ..\CORE\startup_stm32f40_41xxx.s + +CAN1_RX1_IRQHandler 0000001A + +Symbol: CAN1_RX1_IRQHandler + Definitions + At line 338 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 108 in file ..\CORE\startup_stm32f40_41xxx.s + At line 255 in file ..\CORE\startup_stm32f40_41xxx.s + +CAN1_SCE_IRQHandler 0000001A + +Symbol: CAN1_SCE_IRQHandler + Definitions + At line 339 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 109 in file ..\CORE\startup_stm32f40_41xxx.s + At line 256 in file ..\CORE\startup_stm32f40_41xxx.s + +CAN1_TX_IRQHandler 0000001A + +Symbol: CAN1_TX_IRQHandler + Definitions + At line 336 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + + + +ARM Macro Assembler Page 2 Alphabetic symbol ordering +Relocatable symbols + + At line 106 in file ..\CORE\startup_stm32f40_41xxx.s + At line 253 in file ..\CORE\startup_stm32f40_41xxx.s + +CAN2_RX0_IRQHandler 0000001A + +Symbol: CAN2_RX0_IRQHandler + Definitions + At line 381 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 151 in file ..\CORE\startup_stm32f40_41xxx.s + At line 298 in file ..\CORE\startup_stm32f40_41xxx.s + +CAN2_RX1_IRQHandler 0000001A + +Symbol: CAN2_RX1_IRQHandler + Definitions + At line 382 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 152 in file ..\CORE\startup_stm32f40_41xxx.s + At line 299 in file ..\CORE\startup_stm32f40_41xxx.s + +CAN2_SCE_IRQHandler 0000001A + +Symbol: CAN2_SCE_IRQHandler + Definitions + At line 383 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 153 in file ..\CORE\startup_stm32f40_41xxx.s + At line 300 in file ..\CORE\startup_stm32f40_41xxx.s + +CAN2_TX_IRQHandler 0000001A + +Symbol: CAN2_TX_IRQHandler + Definitions + At line 380 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 150 in file ..\CORE\startup_stm32f40_41xxx.s + At line 297 in file ..\CORE\startup_stm32f40_41xxx.s + +CRYP_IRQHandler 0000001A + +Symbol: CRYP_IRQHandler + Definitions + At line 396 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 166 in file ..\CORE\startup_stm32f40_41xxx.s + At line 313 in file ..\CORE\startup_stm32f40_41xxx.s + +DCMI_IRQHandler 0000001A + +Symbol: DCMI_IRQHandler + Definitions + At line 395 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 165 in file ..\CORE\startup_stm32f40_41xxx.s + At line 312 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA1_Stream0_IRQHandler 0000001A + + + + +ARM Macro Assembler Page 3 Alphabetic symbol ordering +Relocatable symbols + +Symbol: DMA1_Stream0_IRQHandler + Definitions + At line 328 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 98 in file ..\CORE\startup_stm32f40_41xxx.s + At line 245 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA1_Stream1_IRQHandler 0000001A + +Symbol: DMA1_Stream1_IRQHandler + Definitions + At line 329 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 99 in file ..\CORE\startup_stm32f40_41xxx.s + At line 246 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA1_Stream2_IRQHandler 0000001A + +Symbol: DMA1_Stream2_IRQHandler + Definitions + At line 330 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 100 in file ..\CORE\startup_stm32f40_41xxx.s + At line 247 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA1_Stream3_IRQHandler 0000001A + +Symbol: DMA1_Stream3_IRQHandler + Definitions + At line 331 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 101 in file ..\CORE\startup_stm32f40_41xxx.s + At line 248 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA1_Stream4_IRQHandler 0000001A + +Symbol: DMA1_Stream4_IRQHandler + Definitions + At line 332 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 102 in file ..\CORE\startup_stm32f40_41xxx.s + At line 249 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA1_Stream5_IRQHandler 0000001A + +Symbol: DMA1_Stream5_IRQHandler + Definitions + At line 333 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 103 in file ..\CORE\startup_stm32f40_41xxx.s + At line 250 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA1_Stream6_IRQHandler 0000001A + +Symbol: DMA1_Stream6_IRQHandler + Definitions + At line 334 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 104 in file ..\CORE\startup_stm32f40_41xxx.s + + + +ARM Macro Assembler Page 4 Alphabetic symbol ordering +Relocatable symbols + + At line 251 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA1_Stream7_IRQHandler 0000001A + +Symbol: DMA1_Stream7_IRQHandler + Definitions + At line 364 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 134 in file ..\CORE\startup_stm32f40_41xxx.s + At line 281 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA2_Stream0_IRQHandler 0000001A + +Symbol: DMA2_Stream0_IRQHandler + Definitions + At line 373 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 143 in file ..\CORE\startup_stm32f40_41xxx.s + At line 290 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA2_Stream1_IRQHandler 0000001A + +Symbol: DMA2_Stream1_IRQHandler + Definitions + At line 374 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 144 in file ..\CORE\startup_stm32f40_41xxx.s + At line 291 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA2_Stream2_IRQHandler 0000001A + +Symbol: DMA2_Stream2_IRQHandler + Definitions + At line 375 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 145 in file ..\CORE\startup_stm32f40_41xxx.s + At line 292 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA2_Stream3_IRQHandler 0000001A + +Symbol: DMA2_Stream3_IRQHandler + Definitions + At line 376 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 146 in file ..\CORE\startup_stm32f40_41xxx.s + At line 293 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA2_Stream4_IRQHandler 0000001A + +Symbol: DMA2_Stream4_IRQHandler + Definitions + At line 377 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 147 in file ..\CORE\startup_stm32f40_41xxx.s + At line 294 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA2_Stream5_IRQHandler 0000001A + +Symbol: DMA2_Stream5_IRQHandler + + + +ARM Macro Assembler Page 5 Alphabetic symbol ordering +Relocatable symbols + + Definitions + At line 385 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 155 in file ..\CORE\startup_stm32f40_41xxx.s + At line 302 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA2_Stream6_IRQHandler 0000001A + +Symbol: DMA2_Stream6_IRQHandler + Definitions + At line 386 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 156 in file ..\CORE\startup_stm32f40_41xxx.s + At line 303 in file ..\CORE\startup_stm32f40_41xxx.s + +DMA2_Stream7_IRQHandler 0000001A + +Symbol: DMA2_Stream7_IRQHandler + Definitions + At line 387 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 157 in file ..\CORE\startup_stm32f40_41xxx.s + At line 304 in file ..\CORE\startup_stm32f40_41xxx.s + +DebugMon_Handler 00000014 + +Symbol: DebugMon_Handler + Definitions + At line 219 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 81 in file ..\CORE\startup_stm32f40_41xxx.s + At line 220 in file ..\CORE\startup_stm32f40_41xxx.s + +Default_Handler 0000001A + +Symbol: Default_Handler + Definitions + At line 232 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + None +Comment: Default_Handler unused +ETH_IRQHandler 0000001A + +Symbol: ETH_IRQHandler + Definitions + At line 378 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 148 in file ..\CORE\startup_stm32f40_41xxx.s + At line 295 in file ..\CORE\startup_stm32f40_41xxx.s + +ETH_WKUP_IRQHandler 0000001A + +Symbol: ETH_WKUP_IRQHandler + Definitions + At line 379 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 149 in file ..\CORE\startup_stm32f40_41xxx.s + At line 296 in file ..\CORE\startup_stm32f40_41xxx.s + + + + +ARM Macro Assembler Page 6 Alphabetic symbol ordering +Relocatable symbols + +EXTI0_IRQHandler 0000001A + +Symbol: EXTI0_IRQHandler + Definitions + At line 323 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 93 in file ..\CORE\startup_stm32f40_41xxx.s + At line 240 in file ..\CORE\startup_stm32f40_41xxx.s + +EXTI15_10_IRQHandler 0000001A + +Symbol: EXTI15_10_IRQHandler + Definitions + At line 357 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 127 in file ..\CORE\startup_stm32f40_41xxx.s + At line 274 in file ..\CORE\startup_stm32f40_41xxx.s + +EXTI1_IRQHandler 0000001A + +Symbol: EXTI1_IRQHandler + Definitions + At line 324 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 94 in file ..\CORE\startup_stm32f40_41xxx.s + At line 241 in file ..\CORE\startup_stm32f40_41xxx.s + +EXTI2_IRQHandler 0000001A + +Symbol: EXTI2_IRQHandler + Definitions + At line 325 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 95 in file ..\CORE\startup_stm32f40_41xxx.s + At line 242 in file ..\CORE\startup_stm32f40_41xxx.s + +EXTI3_IRQHandler 0000001A + +Symbol: EXTI3_IRQHandler + Definitions + At line 326 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 96 in file ..\CORE\startup_stm32f40_41xxx.s + At line 243 in file ..\CORE\startup_stm32f40_41xxx.s + +EXTI4_IRQHandler 0000001A + +Symbol: EXTI4_IRQHandler + Definitions + At line 327 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 97 in file ..\CORE\startup_stm32f40_41xxx.s + At line 244 in file ..\CORE\startup_stm32f40_41xxx.s + +EXTI9_5_IRQHandler 0000001A + +Symbol: EXTI9_5_IRQHandler + Definitions + At line 340 in file ..\CORE\startup_stm32f40_41xxx.s + + + +ARM Macro Assembler Page 7 Alphabetic symbol ordering +Relocatable symbols + + Uses + At line 110 in file ..\CORE\startup_stm32f40_41xxx.s + At line 257 in file ..\CORE\startup_stm32f40_41xxx.s + +FLASH_IRQHandler 0000001A + +Symbol: FLASH_IRQHandler + Definitions + At line 321 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 91 in file ..\CORE\startup_stm32f40_41xxx.s + At line 238 in file ..\CORE\startup_stm32f40_41xxx.s + +FPU_IRQHandler 0000001A + +Symbol: FPU_IRQHandler + Definitions + At line 398 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 168 in file ..\CORE\startup_stm32f40_41xxx.s + At line 315 in file ..\CORE\startup_stm32f40_41xxx.s + +FSMC_IRQHandler 0000001A + +Symbol: FSMC_IRQHandler + Definitions + At line 365 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 135 in file ..\CORE\startup_stm32f40_41xxx.s + At line 282 in file ..\CORE\startup_stm32f40_41xxx.s + +HASH_RNG_IRQHandler 0000001A + +Symbol: HASH_RNG_IRQHandler + Definitions + At line 397 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 167 in file ..\CORE\startup_stm32f40_41xxx.s + At line 314 in file ..\CORE\startup_stm32f40_41xxx.s + +HardFault_Handler 0000000A + +Symbol: HardFault_Handler + Definitions + At line 195 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 72 in file ..\CORE\startup_stm32f40_41xxx.s + At line 196 in file ..\CORE\startup_stm32f40_41xxx.s + +I2C1_ER_IRQHandler 0000001A + +Symbol: I2C1_ER_IRQHandler + Definitions + At line 349 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 119 in file ..\CORE\startup_stm32f40_41xxx.s + At line 266 in file ..\CORE\startup_stm32f40_41xxx.s + +I2C1_EV_IRQHandler 0000001A + + + +ARM Macro Assembler Page 8 Alphabetic symbol ordering +Relocatable symbols + + +Symbol: I2C1_EV_IRQHandler + Definitions + At line 348 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 118 in file ..\CORE\startup_stm32f40_41xxx.s + At line 265 in file ..\CORE\startup_stm32f40_41xxx.s + +I2C2_ER_IRQHandler 0000001A + +Symbol: I2C2_ER_IRQHandler + Definitions + At line 351 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 121 in file ..\CORE\startup_stm32f40_41xxx.s + At line 268 in file ..\CORE\startup_stm32f40_41xxx.s + +I2C2_EV_IRQHandler 0000001A + +Symbol: I2C2_EV_IRQHandler + Definitions + At line 350 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 120 in file ..\CORE\startup_stm32f40_41xxx.s + At line 267 in file ..\CORE\startup_stm32f40_41xxx.s + +I2C3_ER_IRQHandler 0000001A + +Symbol: I2C3_ER_IRQHandler + Definitions + At line 390 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 160 in file ..\CORE\startup_stm32f40_41xxx.s + At line 307 in file ..\CORE\startup_stm32f40_41xxx.s + +I2C3_EV_IRQHandler 0000001A + +Symbol: I2C3_EV_IRQHandler + Definitions + At line 389 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 159 in file ..\CORE\startup_stm32f40_41xxx.s + At line 306 in file ..\CORE\startup_stm32f40_41xxx.s + +MemManage_Handler 0000000C + +Symbol: MemManage_Handler + Definitions + At line 200 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 73 in file ..\CORE\startup_stm32f40_41xxx.s + At line 201 in file ..\CORE\startup_stm32f40_41xxx.s + +NMI_Handler 00000008 + +Symbol: NMI_Handler + Definitions + At line 190 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + + + +ARM Macro Assembler Page 9 Alphabetic symbol ordering +Relocatable symbols + + At line 71 in file ..\CORE\startup_stm32f40_41xxx.s + At line 191 in file ..\CORE\startup_stm32f40_41xxx.s + +OTG_FS_IRQHandler 0000001A + +Symbol: OTG_FS_IRQHandler + Definitions + At line 384 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 154 in file ..\CORE\startup_stm32f40_41xxx.s + At line 301 in file ..\CORE\startup_stm32f40_41xxx.s + +OTG_FS_WKUP_IRQHandler 0000001A + +Symbol: OTG_FS_WKUP_IRQHandler + Definitions + At line 359 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 129 in file ..\CORE\startup_stm32f40_41xxx.s + At line 276 in file ..\CORE\startup_stm32f40_41xxx.s + +OTG_HS_EP1_IN_IRQHandler 0000001A + +Symbol: OTG_HS_EP1_IN_IRQHandler + Definitions + At line 392 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 162 in file ..\CORE\startup_stm32f40_41xxx.s + At line 309 in file ..\CORE\startup_stm32f40_41xxx.s + +OTG_HS_EP1_OUT_IRQHandler 0000001A + +Symbol: OTG_HS_EP1_OUT_IRQHandler + Definitions + At line 391 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 161 in file ..\CORE\startup_stm32f40_41xxx.s + At line 308 in file ..\CORE\startup_stm32f40_41xxx.s + +OTG_HS_IRQHandler 0000001A + +Symbol: OTG_HS_IRQHandler + Definitions + At line 394 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 164 in file ..\CORE\startup_stm32f40_41xxx.s + At line 311 in file ..\CORE\startup_stm32f40_41xxx.s + +OTG_HS_WKUP_IRQHandler 0000001A + +Symbol: OTG_HS_WKUP_IRQHandler + Definitions + At line 393 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 163 in file ..\CORE\startup_stm32f40_41xxx.s + At line 310 in file ..\CORE\startup_stm32f40_41xxx.s + +PVD_IRQHandler 0000001A + + + + +ARM Macro Assembler Page 10 Alphabetic symbol ordering +Relocatable symbols + +Symbol: PVD_IRQHandler + Definitions + At line 318 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 88 in file ..\CORE\startup_stm32f40_41xxx.s + At line 235 in file ..\CORE\startup_stm32f40_41xxx.s + +PendSV_Handler 00000016 + +Symbol: PendSV_Handler + Definitions + At line 223 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 83 in file ..\CORE\startup_stm32f40_41xxx.s + At line 224 in file ..\CORE\startup_stm32f40_41xxx.s + +RCC_IRQHandler 0000001A + +Symbol: RCC_IRQHandler + Definitions + At line 322 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 92 in file ..\CORE\startup_stm32f40_41xxx.s + At line 239 in file ..\CORE\startup_stm32f40_41xxx.s + +RTC_Alarm_IRQHandler 0000001A + +Symbol: RTC_Alarm_IRQHandler + Definitions + At line 358 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 128 in file ..\CORE\startup_stm32f40_41xxx.s + At line 275 in file ..\CORE\startup_stm32f40_41xxx.s + +RTC_WKUP_IRQHandler 0000001A + +Symbol: RTC_WKUP_IRQHandler + Definitions + At line 320 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 90 in file ..\CORE\startup_stm32f40_41xxx.s + At line 237 in file ..\CORE\startup_stm32f40_41xxx.s + +Reset_Handler 00000000 + +Symbol: Reset_Handler + Definitions + At line 177 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 70 in file ..\CORE\startup_stm32f40_41xxx.s + At line 178 in file ..\CORE\startup_stm32f40_41xxx.s + +SDIO_IRQHandler 0000001A + +Symbol: SDIO_IRQHandler + Definitions + At line 366 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 136 in file ..\CORE\startup_stm32f40_41xxx.s + + + +ARM Macro Assembler Page 11 Alphabetic symbol ordering +Relocatable symbols + + At line 283 in file ..\CORE\startup_stm32f40_41xxx.s + +SPI1_IRQHandler 0000001A + +Symbol: SPI1_IRQHandler + Definitions + At line 352 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 122 in file ..\CORE\startup_stm32f40_41xxx.s + At line 269 in file ..\CORE\startup_stm32f40_41xxx.s + +SPI2_IRQHandler 0000001A + +Symbol: SPI2_IRQHandler + Definitions + At line 353 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 123 in file ..\CORE\startup_stm32f40_41xxx.s + At line 270 in file ..\CORE\startup_stm32f40_41xxx.s + +SPI3_IRQHandler 0000001A + +Symbol: SPI3_IRQHandler + Definitions + At line 368 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 138 in file ..\CORE\startup_stm32f40_41xxx.s + At line 285 in file ..\CORE\startup_stm32f40_41xxx.s + +SVC_Handler 00000012 + +Symbol: SVC_Handler + Definitions + At line 214 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 80 in file ..\CORE\startup_stm32f40_41xxx.s + At line 215 in file ..\CORE\startup_stm32f40_41xxx.s + +SysTick_Handler 00000018 + +Symbol: SysTick_Handler + Definitions + At line 227 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 84 in file ..\CORE\startup_stm32f40_41xxx.s + At line 228 in file ..\CORE\startup_stm32f40_41xxx.s + +TAMP_STAMP_IRQHandler 0000001A + +Symbol: TAMP_STAMP_IRQHandler + Definitions + At line 319 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 89 in file ..\CORE\startup_stm32f40_41xxx.s + At line 236 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM1_BRK_TIM9_IRQHandler 0000001A + +Symbol: TIM1_BRK_TIM9_IRQHandler + + + +ARM Macro Assembler Page 12 Alphabetic symbol ordering +Relocatable symbols + + Definitions + At line 341 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 111 in file ..\CORE\startup_stm32f40_41xxx.s + At line 258 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM1_CC_IRQHandler 0000001A + +Symbol: TIM1_CC_IRQHandler + Definitions + At line 344 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 114 in file ..\CORE\startup_stm32f40_41xxx.s + At line 261 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM1_TRG_COM_TIM11_IRQHandler 0000001A + +Symbol: TIM1_TRG_COM_TIM11_IRQHandler + Definitions + At line 343 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 113 in file ..\CORE\startup_stm32f40_41xxx.s + At line 260 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM1_UP_TIM10_IRQHandler 0000001A + +Symbol: TIM1_UP_TIM10_IRQHandler + Definitions + At line 342 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 112 in file ..\CORE\startup_stm32f40_41xxx.s + At line 259 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM2_IRQHandler 0000001A + +Symbol: TIM2_IRQHandler + Definitions + At line 345 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 115 in file ..\CORE\startup_stm32f40_41xxx.s + At line 262 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM3_IRQHandler 0000001A + +Symbol: TIM3_IRQHandler + Definitions + At line 346 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 116 in file ..\CORE\startup_stm32f40_41xxx.s + At line 263 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM4_IRQHandler 0000001A + +Symbol: TIM4_IRQHandler + Definitions + At line 347 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 117 in file ..\CORE\startup_stm32f40_41xxx.s + At line 264 in file ..\CORE\startup_stm32f40_41xxx.s + + + +ARM Macro Assembler Page 13 Alphabetic symbol ordering +Relocatable symbols + + +TIM5_IRQHandler 0000001A + +Symbol: TIM5_IRQHandler + Definitions + At line 367 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 137 in file ..\CORE\startup_stm32f40_41xxx.s + At line 284 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM6_DAC_IRQHandler 0000001A + +Symbol: TIM6_DAC_IRQHandler + Definitions + At line 371 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 141 in file ..\CORE\startup_stm32f40_41xxx.s + At line 288 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM7_IRQHandler 0000001A + +Symbol: TIM7_IRQHandler + Definitions + At line 372 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 142 in file ..\CORE\startup_stm32f40_41xxx.s + At line 289 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM8_BRK_TIM12_IRQHandler 0000001A + +Symbol: TIM8_BRK_TIM12_IRQHandler + Definitions + At line 360 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 130 in file ..\CORE\startup_stm32f40_41xxx.s + At line 277 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM8_CC_IRQHandler 0000001A + +Symbol: TIM8_CC_IRQHandler + Definitions + At line 363 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 133 in file ..\CORE\startup_stm32f40_41xxx.s + At line 280 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM8_TRG_COM_TIM14_IRQHandler 0000001A + +Symbol: TIM8_TRG_COM_TIM14_IRQHandler + Definitions + At line 362 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 132 in file ..\CORE\startup_stm32f40_41xxx.s + At line 279 in file ..\CORE\startup_stm32f40_41xxx.s + +TIM8_UP_TIM13_IRQHandler 0000001A + +Symbol: TIM8_UP_TIM13_IRQHandler + Definitions + + + +ARM Macro Assembler Page 14 Alphabetic symbol ordering +Relocatable symbols + + At line 361 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 131 in file ..\CORE\startup_stm32f40_41xxx.s + At line 278 in file ..\CORE\startup_stm32f40_41xxx.s + +UART4_IRQHandler 0000001A + +Symbol: UART4_IRQHandler + Definitions + At line 369 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 139 in file ..\CORE\startup_stm32f40_41xxx.s + At line 286 in file ..\CORE\startup_stm32f40_41xxx.s + +UART5_IRQHandler 0000001A + +Symbol: UART5_IRQHandler + Definitions + At line 370 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 140 in file ..\CORE\startup_stm32f40_41xxx.s + At line 287 in file ..\CORE\startup_stm32f40_41xxx.s + +USART1_IRQHandler 0000001A + +Symbol: USART1_IRQHandler + Definitions + At line 354 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 124 in file ..\CORE\startup_stm32f40_41xxx.s + At line 271 in file ..\CORE\startup_stm32f40_41xxx.s + +USART2_IRQHandler 0000001A + +Symbol: USART2_IRQHandler + Definitions + At line 355 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 125 in file ..\CORE\startup_stm32f40_41xxx.s + At line 272 in file ..\CORE\startup_stm32f40_41xxx.s + +USART3_IRQHandler 0000001A + +Symbol: USART3_IRQHandler + Definitions + At line 356 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 126 in file ..\CORE\startup_stm32f40_41xxx.s + At line 273 in file ..\CORE\startup_stm32f40_41xxx.s + +USART6_IRQHandler 0000001A + +Symbol: USART6_IRQHandler + Definitions + At line 388 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 158 in file ..\CORE\startup_stm32f40_41xxx.s + At line 305 in file ..\CORE\startup_stm32f40_41xxx.s + + + + +ARM Macro Assembler Page 15 Alphabetic symbol ordering +Relocatable symbols + +UsageFault_Handler 00000010 + +Symbol: UsageFault_Handler + Definitions + At line 210 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 75 in file ..\CORE\startup_stm32f40_41xxx.s + At line 211 in file ..\CORE\startup_stm32f40_41xxx.s + +WWDG_IRQHandler 0000001A + +Symbol: WWDG_IRQHandler + Definitions + At line 317 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 87 in file ..\CORE\startup_stm32f40_41xxx.s + At line 234 in file ..\CORE\startup_stm32f40_41xxx.s + +94 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Absolute symbols + +Heap_Size 00000200 + +Symbol: Heap_Size + Definitions + At line 52 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 56 in file ..\CORE\startup_stm32f40_41xxx.s +Comment: Heap_Size used once +Stack_Size 00000400 + +Symbol: Stack_Size + Definitions + At line 41 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 44 in file ..\CORE\startup_stm32f40_41xxx.s +Comment: Stack_Size used once +__Vectors_Size 00000188 + +Symbol: __Vectors_Size + Definitions + At line 172 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 67 in file ..\CORE\startup_stm32f40_41xxx.s +Comment: __Vectors_Size used once +3 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +External symbols + +SystemInit 00000000 + +Symbol: SystemInit + Definitions + At line 179 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 182 in file ..\CORE\startup_stm32f40_41xxx.s +Comment: SystemInit used once +__main 00000000 + +Symbol: __main + Definitions + At line 180 in file ..\CORE\startup_stm32f40_41xxx.s + Uses + At line 184 in file ..\CORE\startup_stm32f40_41xxx.s +Comment: __main used once +2 symbols +445 symbols in table diff --git a/OBJ/stm32f4xx_adc.crf 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